Journal ArticleDOI
A Regular Layout for Parallel Adders
TLDR
It is shown that addition of n-bit binary numbers can be performed on a chip with a regular layout in time proportional to log n and with area proportional to n.Abstract:
With VLSI architecture, the chip area and design regularity represent a better measure of cost than the conventional gate count. We show that addition of n-bit binary numbers can be performed on a chip with a regular layout in time proportional to log n and with area proportional to n.read more
Citations
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Dissertation
Les limites technologiques du silicium et tolérance aux fautes
TL;DR: Les technologies de silicium s'approchent de leurs limites physiques en termes de reduction de tailles des transistors, et de la tension d'alimentation, d'augmentation de la vitesse de fonctionnement et du nombre de dispositifs integres dans une puce.
Functional Programming Enabling Flexible Hardware Design at Low Levels of Abstraction
TL;DR: Wired seems like a very promising system that has a good potential of reducing the effort of generating high-quality layouts of complex circuits and is used to improve the accuracy of an algorithm for searching for fast, low-power parallel prefix networks.
Proceedings ArticleDOI
Customizing CPU Instructions for Embedded Vision Systems
TL;DR: In this article, the authors presented the customization of two processors: the Altera NIOS2 and the Tensilica Xtensa, for fundamental algorithms in embedded vision systems: the salient point extraction and the optical flow computation.
Journal ArticleDOI
Proofs of Correctness and Properties of Integer Adder Circuits
Gang Chen,Feng Liu +1 more
TL;DR: This short contribution intends to integrate all formal proofs related to adders in a single place and to add the details when necessary.
Proceedings ArticleDOI
Size-time complexity of Boolean networks for prefix computations
TL;DR: This paper completely characterize the size-time complexity of computing prefixes with boolean networks, which are synchronized interconnections of Boolean gates and one-bit storage devices.
References
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Book
Computer Architecture: A Quantitative Approach
TL;DR: This best-selling title, considered for over a decade to be essential reading for every serious student and practitioner of computer design, has been updated throughout to address the most important trends facing computer designers today.
Journal ArticleDOI
Parallel Prefix Computation
TL;DR: A recurstve construction is used to obtain a product circuit for solving the prefix problem and a Boolean clrcmt which has depth 2[Iog2n] + 2 and size bounded by 14n is obtained for n-bit binary addmon.