Journal ArticleDOI
Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits
Kaushik Roy,Saibal Mukhopadhyay,H. Mahmoodi-Meimand +2 more
- Vol. 91, Iss: 2, pp 305-327
TLDR
Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices and different circuit techniques to reduce the leakage power consumption are explored.Abstract:
High leakage current in deep-submicrometer regimes is becoming a significant contributor to power dissipation of CMOS circuits as threshold voltage, channel length, and gate oxide thickness are reduced. Consequently, the identification and modeling of different leakage components is very important for estimation and reduction of leakage power, especially for low-power applications. This paper reviews various transistor intrinsic leakage mechanisms, including weak inversion, drain-induced barrier lowering, gate-induced drain leakage, and gate oxide tunneling. Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices. Finally, the paper explores different circuit techniques to reduce the leakage power consumption.read more
Citations
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Journal ArticleDOI
On the Total Power Capacity of Regular-LDPC Codes With Iterative Message-Passing Decoders
TL;DR: This paper investigates the scaling behavior of the minimum total power needed to communicate over AWGN channels as the target bit-error-probability tends to zero and proves that a coding strategy using regular-LDPC codes with Gallager-B decoding achieves order-optimal scaling of total power under the node model.
Journal ArticleDOI
Transistor network restructuring against NBTI degradation
TL;DR: Electrical simulation results reveal that the restructuring of intra-cell transistor networks recovers up to 15% of rise delay degradation due to NBTI, while the decomposition of single stage circuit topologies into multi-stage topologies tends to reduce the rise degradation delay at a cost of fall delay degradation.
Journal ArticleDOI
Design and Optimization of Power-Gated Circuits With Autonomous Data Retention
Jun Seomun,Youngsoo Shin +1 more
TL;DR: APG reduces the delay to enter and exit the standby mode by 65% and 28.9%, respectively, with corresponding energy dissipation during the period cut by 46.1% and 36.5%.
Journal ArticleDOI
Control electronics for semiconductor spin qubits
TL;DR: The results show that with further research it is possible to provide scalable electrical control in the vicinity of the qubit, with the concept of a standard 65 nm complementary metal-oxide-semiconductor process.
Proceedings ArticleDOI
An Improved Noise-Tolerant Domino Logic Circuit for High Fan-in Gates
Farshad Moradi,Ali Peiravi +1 more
TL;DR: A new domino logic circuit scheme is proposed to reduce subthreshold leakage current in standby mode and to improve noise immunity for wide OR gates to ensure reliable operation of VLSI chips designed using deep submicron process technology.
References
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TL;DR: This paper considers the design, fabrication, and characterization of very small Mosfet switching devices suitable for digital integrated circuits, using dimensions of the order of 1 /spl mu/.
Book
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TL;DR: In this article, the authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices.
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TL;DR: The Planar Technology of Semiconductor Surfaces is described in this article, where it is shown that the planar planar technology can be used to model the surface effects on p-n junction transistors.
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TL;DR: Digital Integrated Circuits as discussed by the authors is a practical book that bridges the gap between the circuit perspective and system perspective of digital integrated circuit design, including the impact of interconnect, design for low power, issues in timing and clocking, design methodologies and the tremendous effect of design automation on the digital design perspective.