Amkor Technology

About: Amkor Technology is a company organization based out in Tempe, Arizona, United States. It is known for research contribution in the topics: Semiconductor package & Substrate (printing). The organization has 1069 authors who have published 1106 publications receiving 26778 citations. The organization is also known as: Amkor & Amkor Technology, Inc..

Stackable treated via package and method

Abstract: A method of forming a stackable treated via package includes coupling interconnection balls to terminals. The interconnection balls are encapsulated in a package body. Via apertures are formed in the package body to expose the interconnection balls. The interconnection balls are treated to form treated interconnection balls comprising treated surfaces. The treated interconnection balls of the stackable treated via package enhance bonding with interconnection balls of a stacked electronic component package thus maximizing yield.

Method and circuit module package for automated switch actuator insertion

Abstract: A method and circuit module package for automated switch actuator insertion provides automated assembly of circuit modules having an integrated switch actuator, such as Secure Digital cards. A switch actuator is inserted automatically into a circuit module package housing by a robotic assembler. The housing and switch actuator have mating surfaces to retain the switch actuator within the housing so that shipping and subsequent assembly do not dislodge the switch actuator. The switch actuator/housing assembly can be contoured such that the switch actuator/housing assemblies may be stacked and then fed to a stack-loading feeder for joining of the actuator/housing assemblies to the remainder of the circuit module package housing. The switch actuator may be made from a material having a higher melting point than the housing so that ultrasonic welding may be performed on the circuit module package without joining the switch actuator permanently to the circuit module package assembly.

Process for bonding semiconductor chip

Abstract: An improved process for bonding a semiconductor chip to a substrate is disclosed. In the process, a gold bump is formed on an aluminum bond pad of the chip thus forming a flip chip. A screen with an opening is placed on the substrate prior to dotting insulating epoxy on the opening. The epoxy is bladed with a printing blade thus forming an epoxy layer having a predetermined area and uniform thickness. The flip chip is, thereafter, placed on the substrate such that the gold bump is brought into electrical contact with a lead finger of the substrate through thermocompression bonding. Then the chip and substrate are put in an oven in order to permanently cure the epoxy layer. It is preferable to precure the epoxy layer prior to the permanent curing step thereby allowing thermal stress to be distributed to both the gold bump and the precured epoxy layer.

Board level reliability assessments of thru-mold via package on package (TMV™ PoP)

Abstract: In recent years, Package-on-package (PoP) has been adopted as major application package platform in 3D integration of logic and memory devices. However, as electronic technology developed, higher technology requirements are requested in packaging. Amkor Technology, Inc introduced the next generation PoP solution to meet the next generation technology requirements in 2008 by the using of TMV™ technology which incorporates a laser ablation process that is conducive to current matrix-molded semiconductor assembly techniques. The next generation PoP platform named as TMV™ PoP has been qualified in all package level qualification tests. Also in board level reliability tests, BLR TC & drop performances are similar or better than those of the conventional PoP.

Moisture-resistant integrated circuit chip package

Abstract: A novel, moisture-resistant integrated circuit chip package is disclosed In one embodiment, the integrated circuit chip package includes a substrate having a chip side and a backside A first conductive layer is formed on the chip side of the substrate, and has a pattern forming conductive traces A first soldermask layer is formed on the chip side of the substrate The first soldermask layer directly contacts the first conductive layer The first soldermask layer has at least one opening formed therein A first contact layer is formed over the first conductive layer in the opening of the first soldermask layer A second conductive layer is formed on the backside of the substrate A second soldermask layer is formed on the back side of the substrate and has at least one opening formed therein A second contact layer overlies the second conductive layer in the opening of the second soldermask layer The soldermask layer on the chip side of the substrate has high adhesion to the conductive layer, resulting in a high level of moisture resistance for the package