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Institution

Amkor Technology

CompanyTempe, Arizona, United States
About: Amkor Technology is a company organization based out in Tempe, Arizona, United States. It is known for research contribution in the topics: Semiconductor package & Substrate (printing). The organization has 1069 authors who have published 1106 publications receiving 26778 citations. The organization is also known as: Amkor & Amkor Technology, Inc..


Papers
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Patent
11 Mar 1999
TL;DR: In this article, a package for an integrated circuit is described, as well as methods of making the package (10), which includes a substrate (200) having a generally planar first surface (201) on which a metal die pad is formed.
Abstract: A package for an integrated circuit is described, as are methods of making the package (10). The package includes a substrate (200) having a generally planar first surface (201) on which a metal die pad is formed. An integrated circuit die (100) is attached to the metal die pad. An adhesive bead (300) surrounds the integrated circuit die and covers the exposed periphery of the metal die pad. A generally planar lid (401) is in a press-fitted interconnection with the bead. An adhesive material covers conductive structures on the die, such as bonding pads, to prevent corrosion. Optionally, the package has vertical peripheral sides. The methods of making the package include methods for making packages individually, or making a plurality of packages simultaneously. Where a plurality of packages are made simultaneously, integrated circuit die are placed on each of a plurality of physically-joined package substrates on a generally planar sheet of substrate material. An adhesive bead is applied around each die. In cross section, the bead has a central peak and a shorter peak on each side of the central peak. A sheet of lid material is placed onto the beads. After the bead is hardened, individual packages are formed by cutting the substrate sheet, lid sheet, and beads.

6 citations

Patent
23 Nov 1999
TL;DR: In this article, a continuous sheet of an adhesive film is placed on the substrate strip so as to cover the plurality of package sites, and the adhesive film sheet is then cured by applying heat or pressure or heat and pressure to the substrate and the sheet of adhesive film.
Abstract: Methods of making packages for integrated circuit devices are described. An exemplary method includes providing a substrate sheet having an array of package sites at which individual integrated circuit packages will be assembled. A continuous sheet of an adhesive film is placed on the substrate strip so as to cover the plurality of package sites. The adhesive film sheet is then cured by applying heat or pressure or heat and pressure to the substrate strip and the sheet of adhesive film. The pressure and/or heat cause the sheet of adhesive film to be permanently attached to the substrate strip. A subsequent step forms one or more apertures though the joined substrate strip and adhesive film at each package site. An integrated circuit die is mounted on the adhesive film at each package site, and bond wires are attached through the aperture between metallizations of the substrate and the integrated circuit device. After the one or more apertures at each site are filled with an insulative material, the adjacent package sites are separated, forming individual packages each having an integrated circuit device.

6 citations

Patent
02 May 2014
TL;DR: In this article, a micro-lead frame structure includes one or more stiffness reinforcing structures formed on leads and/or connecting structures, which are configured to reduce deformation defects and electrical short defects caused by assembly processes.
Abstract: In one embodiment, a micro lead frame structure includes one or more stiffness reinforcing structures formed on leads and/or connecting structures. The stiffness reinforcing structures can be formed by leaving predetermined portions of the micro lead frame at full thickness including, for example, portions of an inner lead, portions of an outer lead, and portions of a connecting bar, combinations thereof, and other structures. The stiffness reinforcing structures are configured to reduce deformation defects and electrical short defects caused by assembly processes.

6 citations

Patent
23 Aug 2002
TL;DR: In this article, an optic semiconductor package includes a plate-shaped substrate having an insulation layer through which two spaced apart layer apertures are formed, and the substrate further includes a plurality of electrically conductive patterns formed on the wall surfaces of the layers and a lower surface of the insulation layer.
Abstract: An optic semiconductor package includes a plate shaped substrate having an insulation layer through which two spaced apart layer apertures are formed. The substrate further includes a plurality of electrically conductive patterns formed on the wall surfaces of the layer apertures and a lower surface of the insulation layer. One of a laser diode and a photo detector are disposed in a different one of the two layer apertures and are each electrically connected to the electrically conductive patterns through conductive bumps formed on the laser diode and the photo detector. An insulation plate, having a plurality of plate apertures formed through portions of the insulation plate adjacent to the electrically conductive patterns, is coupled to the lower surface of the substrate. One of a plurality of conductive pins electrically connected with the electrically conductive patterns is fitted in each of the plate apertures of the insulation plate and extends downward from the insulation plate. An integral metal cap is attached to upper and side portions of the substrate to protect the substrate, the laser diode, and the photo detector from the outside environment. The metal cap has an opening formed in its ceiling. A glass is attached below the opening to enable light to be transmitted through the glass from the laser diode to an exterior device and from an exterior device to the photo detector.

6 citations

Patent
24 Sep 2003
TL;DR: In this paper, a semiconductor package comprising a die pad defining opposed top and bottom surfaces and a peripheral edge is described. And the leads of the leads are exposed in the package body, which encapsulates the die pad, the support feet, the leads and the semiconductor die.
Abstract: A semiconductor package comprising a die pad defining opposed top and bottom surfaces and a peripheral edge. Attached to the peripheral edge of the die pad is a plurality of support feet which extend downwardly relative to the bottom surface thereof. A plurality of leads extend at least partially about the peripheral edge of the die pad in spaced relation thereto. Attached to the top surface of the die pad is a semiconductor die which is electrically connected to at least one of the leads. A package body encapsulates the die pad, the support feet, the leads and the semiconductor die such that at least portions of the leads are exposed in the package body.

6 citations


Authors

Showing all 1070 results

NameH-indexPapersCitations
Thomas P. Glenn481306676
Dong-Hoon Lee4876223162
Joungho Kim405797365
Steven Webster34833322
Young Bae Park332164325
Roy Dale Hollaway28532324
Ronald Patrick Huemoeller26912385
Robert Francis Darveaux23701881
MinJae Lee23993083
Il Kwon Shim21411403
Vincent DiCaprio20271973
Sukianto Rusli19441308
Glenn A. Rinne1934898
Ahmer Syed18551192
David Jon Hiner18541173
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20221
202112
202022
201922
201832
201728