Institution
Amkor Technology
Company•Tempe, Arizona, United States•
About: Amkor Technology is a company organization based out in Tempe, Arizona, United States. It is known for research contribution in the topics: Semiconductor package & Substrate (printing). The organization has 1069 authors who have published 1106 publications receiving 26778 citations. The organization is also known as: Amkor & Amkor Technology, Inc..
Topics: Semiconductor package, Substrate (printing), Die (integrated circuit), Layer (electronics), Flip chip
Papers published on a yearly basis
Papers
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05 Feb 2007TL;DR: In this article, a compliant dielectric layer on a substrate with an input/output pad thereon and a compliant conformal layer on the substrate such that a second portion of the substrate is free of the compliant layer was discussed.
Abstract: An electronic device may include a substrate with an input/output pad thereon, and a compliant dielectric layer on a first portion of the substrate such that a second portion of the substrate is free of the compliant dielectric layer. A conductive redistribution line may extend from the input/output pad to the compliant dielectric layer so that the compliant dielectric layer is between a bump pad portion of the conductive redistribution line and the substrate. A first solder bump may be on the bump pad portion of the conductive redistribution line so that the compliant dielectric layer is between the first solder bump and the substrate. A second solder bump may be on the second portion of the substrate that is free of the compliant dielectric layer. Related methods are also discussed.
16 citations
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15 Feb 2006TL;DR: In this paper, first and second covers are movably attached to a case for selectively covering or exposing the I/O pads and the test features/pads of the module of the memory card.
Abstract: A memory card including a module comprising at least a printed circuit board having an electronic circuit device mounted thereto and at least one I/O pad and at least one test pad disposed thereon. The module is inserted into a complementary cavity formed within a case of the memory card, such case generally defining the outer appearance of the memory card. The module is secured within the cavity of the case through the use of an adhesive. In each embodiment of the present invention, first and second covers are movably attached to a case for selectively covering or exposing the I/O pads and the test features/pads of the module of the memory card.
16 citations
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20 Aug 2008TL;DR: In this article, a barrier layer was formed on the exposed portion of the seed layer, and a bump was created on the barrier layer to remove the mask from the exposed seed layer.
Abstract: Forming an electronic structure may include forming a seed layer on a substrate, and forming a mask on the seed layer. The mask may include an aperture therein exposing a portion of the seed layer, and a barrier layer may be formed on the exposed portion of the seed layer. A bump may be formed on the barrier layer, and the mask may be removed. In addition, portions of the seed layer may be selectively removed using the barrier layer as an etch mask.
15 citations
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06 May 2008TL;DR: In this paper, a lead frame has a land connecting bar, an upper surface of which is half-etched, and wire bonding regions of the leads are positioned on a plane higher than the second lands.
Abstract: Disclosed is a lead frame, a semiconductor device and a fabrication method related to the semiconductor device. Since the lead frame has a land connecting bar, an upper surface of which is half-etched, the land connecting bar is more easily removed by a blade than a conventional land connecting bar in a fabrication process for the semiconductor device. Accordingly, stress applied to the lands when the land connecting bar is removed is reduced, and a flatness of the lands is maintained. Also, first and second lands constituting the lands are alternately formed with the land connecting bar, leads are alternately formed with the second lands, and wire bonding regions of the leads are positioned on a plane higher than the second lands. Accordingly, an interval between the conductive wires can be constantly maintained and the conductive wires have different traces, thus preventing a short between the conductive wires due to wire sweeping in an encapsulation process.
15 citations
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26 May 2009TL;DR: In this paper, the Pb-Free flip-chip interconnects have been introduced to the industry and have been in high volume production for a few years, but they are not compliant with the RoHS directive.
Abstract: For the past several years, the semiconductor industry has been responding to the RoHS directive to eliminate certain hazardous substances from electronic components. One of the areas where work is still ongoing to comply is in the area of flip chip interconnects. Currently, leaded flip chip interconnects are allowed under an exemption in the RoHS directive due to a perceived lack of a technically viable solution. Recently, a number of Pb-Free flip chip interconnects have been introduced to the industry and have been in high volume production for a few years.
15 citations
Authors
Showing all 1070 results
Name | H-index | Papers | Citations |
---|---|---|---|
Thomas P. Glenn | 48 | 130 | 6676 |
Dong-Hoon Lee | 48 | 762 | 23162 |
Joungho Kim | 40 | 579 | 7365 |
Steven Webster | 34 | 83 | 3322 |
Young Bae Park | 33 | 216 | 4325 |
Roy Dale Hollaway | 28 | 53 | 2324 |
Ronald Patrick Huemoeller | 26 | 91 | 2385 |
Robert Francis Darveaux | 23 | 70 | 1881 |
MinJae Lee | 23 | 99 | 3083 |
Il Kwon Shim | 21 | 41 | 1403 |
Vincent DiCaprio | 20 | 27 | 1973 |
Sukianto Rusli | 19 | 44 | 1308 |
Glenn A. Rinne | 19 | 34 | 898 |
Ahmer Syed | 18 | 55 | 1192 |
David Jon Hiner | 18 | 54 | 1173 |