Institution
Amkor Technology
Company•Tempe, Arizona, United States•
About: Amkor Technology is a company organization based out in Tempe, Arizona, United States. It is known for research contribution in the topics: Semiconductor package & Substrate (printing). The organization has 1069 authors who have published 1106 publications receiving 26778 citations. The organization is also known as: Amkor & Amkor Technology, Inc..
Topics: Semiconductor package, Substrate (printing), Die (integrated circuit), Layer (electronics), Flip chip
Papers published on a yearly basis
Papers
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27 Sep 2006TL;DR: In this article, a stack of semiconductor dies is disclosed, which consists of a first semiconductor die and at least one first support that are attached to a substrate surface, followed by a second and a third support attached to the active surface of the first and the coplanar surface of a second support.
Abstract: A stack of semiconductor dies is disclosed. A first stack level includes a first semiconductor die and at least one first support that are attached to a substrate surface. A second level includes a second semiconductor die and at least one second support that are attached to the active surface of the first semiconductor die and to a coplanar surface of the first support(s). A third level includes a third semiconductor die attached to the active surface of the second semiconductor die and to a coplanar surface of the second support(s). The second and third semiconductor dies do not overlap bond pads of the first and second semiconductor dies, respectively. An adhesive film overlies the entire inactive surface of the second and third semiconductor dies, and attaches the second and third semiconductor dies to the immediately underlying active surface and support(s).
7 citations
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10 Jan 2007TL;DR: In this paper, a method of processing a wafer including a plurality of integrated circuit devices on a front side of the wafer, may include thinning the Wafer from a back side opposite the front side.
Abstract: A method of processing a wafer including a plurality of integrated circuit devices on a front side of the wafer, may include thinning the wafer from a back side opposite the front side. After thinning the wafer, a back side layer may be provided on the back side of the thinned wafer opposite the front side, and the back side layer may be configured to counter stress on the front side of the wafer including the plurality of integrated circuit devices thereon. After providing the back side layer, the plurality of integrated circuit devices may be separated. Related structures are also discussed.
7 citations
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15 Aug 2016TL;DR: In this paper, an antenna is formed on the principal surface by applying an electrically conductive coating, and an embedded interconnect extends through the package body between the substrate and principal surface and electrically connects the second antenna terminal to the antenna.
Abstract: An electronic component package includes a substrate and an electronic component mounted to the substrate, the electronic component including a bond pad. A first antenna terminal is electrically connected to the bond pad, the first antenna terminal being electrically connected to a second antenna terminal of the substrate. A package body encloses the electronic component, the package body having a principal surface. An antenna is formed on the principal surface by applying an electrically conductive coating. An embedded interconnect extends through the package body between the substrate and the principal surface and electrically connects the second antenna terminal to the antenna. Applying an electrically conductive coating to form the antenna is relatively simple thus minimizing the overall package manufacturing cost. Further, the antenna is relatively thin thus minimizing the overall package size.
7 citations
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15 Nov 1999TL;DR: In this article, the micromachine chips are tested for validity while they are still in wafer form and the defective micromachines are marked or otherwise identified, and the coupons are attached to the defective ones.
Abstract: Micromachine chips are tested for validity while the micromachine chips are still in wafer form. Any defective micromachine chips are marked or otherwise identified. Coupons are attached to the micromachine chips. The coupons are attached only to the micromachine chips which have been tested and found to be good. In this manner, waste of coupons is avoided and labor associated with attaching the coupons to defective micromachine chips is saved.
7 citations
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05 May 2000TL;DR: In this paper, a method of forming an encapsulated integrated circuit package includes forming a large number of traces spaced a significant distance from the integrated circuit, and intermediate bonding pads are formed between the integrated circuits and the traces.
Abstract: A method of forming an encapsulated integrated circuit package includes forming a large number of traces spaced a significant distance from the integrated circuit. Intermediate bonding pads are formed between the integrated circuit and the traces. Bond pads of the integrated circuit are electrically connected to corresponding traces by corresponding long wires, which are intermediately bonded to the intermediate bonding pads. Since the long wires are intermediately bonded to intermediate bonding pads and extend along the surface of the substrate, the long wires are not susceptible to wire sweep during the encapsulation process used to form the package body.
7 citations
Authors
Showing all 1070 results
Name | H-index | Papers | Citations |
---|---|---|---|
Thomas P. Glenn | 48 | 130 | 6676 |
Dong-Hoon Lee | 48 | 762 | 23162 |
Joungho Kim | 40 | 579 | 7365 |
Steven Webster | 34 | 83 | 3322 |
Young Bae Park | 33 | 216 | 4325 |
Roy Dale Hollaway | 28 | 53 | 2324 |
Ronald Patrick Huemoeller | 26 | 91 | 2385 |
Robert Francis Darveaux | 23 | 70 | 1881 |
MinJae Lee | 23 | 99 | 3083 |
Il Kwon Shim | 21 | 41 | 1403 |
Vincent DiCaprio | 20 | 27 | 1973 |
Sukianto Rusli | 19 | 44 | 1308 |
Glenn A. Rinne | 19 | 34 | 898 |
Ahmer Syed | 18 | 55 | 1192 |
David Jon Hiner | 18 | 54 | 1173 |