Amkor Technology

About: Amkor Technology is a company organization based out in Tempe, Arizona, United States. It is known for research contribution in the topics: Semiconductor package & Substrate (printing). The organization has 1069 authors who have published 1106 publications receiving 26778 citations. The organization is also known as: Amkor & Amkor Technology, Inc..

Intermetallic Compound Growth and Reliability of Cu Pillar Bumps Under Current Stressing

Abstract: Fine-pitch Cu pillar bumps have been adopted for flip-chip bonding technology. Intermetallic compound (IMC) growth in Cu pillar bumps was investigated as a function of annealing or current stressing by in situ observation. The effect of IMC growth on the mechanical reliability of the Cu pillar bumps was also investigated. It is noteworthy that Sn exhaustion was observed after 240 h of annealing when current stressing was not applied, and IMC growth rates were changed remarkably. As the applied current densities increased, the time required for complete Sn consumption became shorter. In addition, Kirkendall voids, which would be detrimental to the mechanical reliability of Cu pillar bumps, were observed in both Cu3Sn/Cu pillars and Cu3Sn/Cu under-bump metallization interfaces. Die shear force was measured for Cu pillar samples prepared with various annealing times, and degradation of mechanical strength was observed.

Saw and etch singulation method for a chip package

Abstract: A method of fabricating semiconductor packages from a lead frame strip which includes a mold cap applied to one side thereof, and defines a multiplicity of lead frames integrally connected to each other by connecting bars which extend in multiple rows and columns and define saw streets. In the singulation method of the present invention, the mold cap is sawed along the saw streets to expose the connecting bars. Thereafter, the connecting bars are chemically etched to separate the lead frames from each other.

PoP/CSP warpage evaluation and viscoelastic modeling

Abstract: The purpose of this paper was to evaluate the critical factors for package-on-package (PoP) and chip scale package (CSP) warpage control through experiments and modeling. Shadow moire was used to measure package warpage from room temperature to reflow temperature. The impact of new developments in laminate substrate technology including thin core and emerging low CTE core materials were emphasized in addition to the effects of die size and mold compound material. Warpage data for the package stackable flip chip CSP (PSfcCSP) used in high end PoP stacks as well as the newly developed thru-mold-via (TMV) technology were also reported. The evaluation showed the TMV technology had much less warpage than the conventional type of bare die PSfcCSP. A viscoelastic warpage model was developed to correlate the design of experiments (DOE) data. The viscoelastic property of four different mold compound materials was measured to obtain master curves and time temperature shifting functions by curve fitting the stress relaxation data. The correlation showed the results from the viscoelastic warpage models consistently agreed well with the test data in a wide range of design parameter space covered by the DOE. Furthermore, chemical shrinkage data was integrated with the viscoelastic relaxation to properly model the warpage during the mold curing step. The correlation data showed this was a much more effective approach to accurately model the actual shrinkage effect on warpage.

Method of assembling a snap lid image sensor package

Abstract: An image sensor package includes a molding having a locking feature. The package further includes a snap lid having a tab, where the tab is attached to the locking feature of the molding. To form the image sensor package, a window is placed in a pocket of the molding. The snap lid is secured in place. Once secured, the snap lid presses against a peripheral region of an exterior surface of the window. The window is sandwiched between the molding and the snap lid and held in place.

Image sensor package and its manufacturing method

Abstract: Disclosed are an image sensor package and its manufacturing method. As an example, an infrared ray protection glass is positioned directly on an image sensing region of an image sensor die. An electrically conductive wire and so forth located outside the image sensing region are encapsulated. At this time, one surface of the infrared ray protection glass is exposed outwardly. A mount holder to which a barrel with lenses is coupled is adhered on a surface of the encapsulant outside the infrared ray protection glass. The mount holder has a similar width to that of the image sensor die. Accordingly, the overall width of the image sensor package can become reduced, and the electrically conductive wire is protected against oxidization because it is surrounded by the encapsulant.