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Institution

Amkor Technology

CompanyTempe, Arizona, United States
About: Amkor Technology is a company organization based out in Tempe, Arizona, United States. It is known for research contribution in the topics: Semiconductor package & Substrate (printing). The organization has 1069 authors who have published 1106 publications receiving 26778 citations. The organization is also known as: Amkor & Amkor Technology, Inc..


Papers
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Patent
31 Jul 2008
TL;DR: In this article, a stacked inverted flip chip (SIFT) package was proposed to minimize the height of the inverted flip-chip package by placing the secondary electronic component between the primary electronic component structure and the substrate.
Abstract: A stacked inverted flip chip package includes a substrate having a secondary electronic component opening and first traces. Primary flip chip bumps electrically and physically couple a primary electronic component structure to the substrate. Secondary flip chip bumps electrically and physically couple an inverted secondary electronic component to the primary electronic component structure between the primary electronic component structure and the substrate and within the secondary electronic component opening. By placing the secondary electronic component between the primary electronic component structure and the substrate, the height of the stacked inverted flip chip package is minimized.

8 citations

Patent
11 Mar 2011
TL;DR: In this paper, the authors proposed a staggered die MEMS package, which includes a substrate having a converter cavity formed therein, and a converter electronic component is mounted within the converter cavity.
Abstract: A staggered die MEMS package includes a substrate having a converter cavity formed therein. A converter electronic component is mounted within the converter cavity. Further, a MEMS electronic component is mounted to both the substrate and the converter electronic component in a staggered die arrangement. By staggering the MEMS electronic component directly on the converter electronic component instead of locating the MEMS electronic component in a side by side arrangement with the converter electronic component, the total package width of the staggered die MEMS package is minimized. Further, by locating the converter electronic component within the converter cavity and staggering the MEMS electronic component directly on the converter electronic component, the total package height, sometimes called Z-height, of the staggered die MEMS package is minimized.

8 citations

Patent
27 Jan 2004
TL;DR: In this article, the substrate is oriented within the interior chamber of the case such that the contacts are exposed within the window thereof, and a spring clip is maintained in a prescribed position relative to the case by a substrate having a plurality of contacts.
Abstract: An electronic device such as a storage device or memory card comprising a unitary case having opposed first and second sides, a closed first end, an open second end, and an interior chamber collectively defined by the first and second sides and the first end. Disposed within the second side of case is a window which communicates with the interior chamber thereof. Disposed within the interior chamber is a substrate having a plurality of contacts. The substrate is oriented within the interior chamber of the case such that the contacts are exposed within the window thereof. The substrate is maintained in a prescribed position relative to the case by a spring clip which is also advanced into the interior chamber and is cooperatively engaged to the substrate.

8 citations

Patent
24 Feb 2000
TL;DR: In this paper, the leadframe is used to form a semiconductor package having a package body formed of a molded resin, and a pseudo tie bar extends diagonally from three of the four corners of the dam bar toward the chip mounting region.
Abstract: A leadframe and molded semiconductor package made using the leadframe are disclosed. The leadframe includes leads extending from a dam bar toward a central chip mounting region. A pseudo tie bar extends diagonally from three of the four corners of the dam bar toward the chip mounting region. A resin introduction slot is at the remaining corner of the dam bar. The resin introduction slot is wider than a space between adjacent leads. The leads adjacent to the resin introduction slot increase in width as they extend from the dam bar toward the chip mounting region. The leadframe is used to form a semiconductor package having a package body formed of a molded resin. The leadframe design minimizes voids and damage caused by the molding process.

8 citations

Patent
23 Jun 2004
TL;DR: In this article, the UBM (Under Bump Metals) formed at the bond pads of the semiconductor die, a plurality of solder balls wetted to UBM, and a second protective layer consisting of a thick collar formed from the surface of the solder ball toward its periphery, so that the joint force of the ball can be more improved.
Abstract: A semiconductor package includes a semiconductor die having a plurality of bond pads, a first protective layer formed at the periphery of the bond pads of the semiconductor die, UBM (Under Bump Metals) formed at the bond pads of the semiconductor die, a plurality of solder balls wetted to the UBM, and a second protective layer formed at the periphery of the solder balls. The second protective layer includes a thick collar, which is formed from the surface of the solder ball toward its periphery, so that the joint force of the solder ball can be more improved. Further, the second protective layer protects the surface of the wafer from the external environment, and absorbs and alleviates the external stress.

8 citations


Authors

Showing all 1070 results

NameH-indexPapersCitations
Thomas P. Glenn481306676
Dong-Hoon Lee4876223162
Joungho Kim405797365
Steven Webster34833322
Young Bae Park332164325
Roy Dale Hollaway28532324
Ronald Patrick Huemoeller26912385
Robert Francis Darveaux23701881
MinJae Lee23993083
Il Kwon Shim21411403
Vincent DiCaprio20271973
Sukianto Rusli19441308
Glenn A. Rinne1934898
Ahmer Syed18551192
David Jon Hiner18541173
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20221
202112
202022
201922
201832
201728