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Institution

Amkor Technology

CompanyTempe, Arizona, United States
About: Amkor Technology is a company organization based out in Tempe, Arizona, United States. It is known for research contribution in the topics: Semiconductor package & Substrate (printing). The organization has 1069 authors who have published 1106 publications receiving 26778 citations. The organization is also known as: Amkor & Amkor Technology, Inc..


Papers
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Patent
13 May 2002
TL;DR: In this article, a laser module includes an alignment plate with a template plate having a laser diode aperture and a photodiode aperture coupled with a weld plate and a reflector.
Abstract: A laser module includes an alignment plate having a template plate having a laser diode aperture and a photodiode aperture. A weld plate and a reflector are coupled to the template plate. The structure further includes a heat sink coupled to the alignment plate. A photodiode subassembly is mounted within the photodiode aperture and to the heat sink. Further, a laser diode subassembly is mounted within the laser diode aperture and to the heat sink. In the above manner, the photodiode subassembly, laser diode subassembly and reflected are precisely aligned.

12 citations

Patent
Seung Nam Son1, Pil Je Sung1, Won Chul Do1, Jungbae Lee1, Ji Hun Lee1 
18 Nov 2014
TL;DR: In this paper, a semiconductor device with reduced warpage is disclosed and may, for example, include bonding at least two semiconductor die to a substrate, forming underfill material between the at least 2D die and the substrate, and removing a portion of the underfill materials between the 2D Die, thereby forming a groove.
Abstract: A semiconductor device with reduced warpage is disclosed and may, for example, include bonding at least two semiconductor die to a substrate, forming underfill material between the at least two semiconductor die and the substrate and between the at least two semiconductor die, and removing a portion of the underfill material between the at least two semiconductor die, thereby forming a groove. The at least two semiconductor die and the underfill material may, for example, be encapsulating utilizing an encapsulant. The groove may, for example, be filled using the encapsulant. The underfill material between the at least two semiconductor die may, for example, be removed utilizing laser etching. The underfill material between the at least two semiconductor die may, for example, be removed to a depth of 60-70% of a thickness of the at least two semiconductor die.

12 citations

Patent
24 Feb 2000
TL;DR: In this paper, a semiconductor package with a fully encapsulated heat sink is described, along with leadframes for making the package, and the heat sink design minimizes voids and damage caused by the encapsulation process while maintaining thermal performance comparable to conventional, exposed heat sinks.
Abstract: A semiconductor package having a fully encapsulated heat sink is disclosed, along with leadframes for making the package. A semiconductor chip is mounted on a surface of the heat sink. The heat sink is in an electrically insulative, thermally conductive connection with a plurality of leads that extend from a first end that overhangs the heat sink to an second end outside of the package body. A ring of a double sided adhesive tape attaches the heat sink to the overhanging portion of the leads. The heat sink design minimizes voids and damage caused by the encapsulation process, while maintaining thermal performance comparable to conventional, exposed heat sinks.

12 citations

Patent
13 Oct 2000
TL;DR: In this article, the authors proposed a semiconductor package that can accommodate a larger semiconductor chip while keeping the foot print area afforded to a conventional semiconductor packages by an improved locking strength between a chip paddle and an encapsulation material.
Abstract: A semiconductor package that can accommodate a larger semiconductor chip while keeping the foot print area afforded to a conventional semiconductor package. The semiconductor package of the present invention also has an improved locking strength between a chip paddle and an encapsulation material. Additionally, the semiconductor chip of the present invention exhibits an improved heat radiation of the semiconductor chip over conventional semiconductor packages. The package of the present invention comprises a semiconductor chip having a plurality of bond pads on its upper surface; a chip paddle bonded to the bottom surface of the semiconductor chip by an adhesive; a plurality of internal leads, each having an etched part at the end facing the chip paddle, which are formed at regular intervals along the perimeter of the chip paddle; conductive wires for electrically connecting the bond pads of the semiconductor chip to the internal leads; and a package body in which the semiconductor chip, the conductive wires, the chip paddle and the internal leads are encapsulated by an encapsulation material while the chip paddle and the internal leads are externally exposed at their side surfaces and bottom surfaces.

12 citations

Patent
Ruben Fuentes1
17 Feb 2012
TL;DR: In this article, an inactive surface of an electronic component is placed into an adhesive on the substrate, and as the adhesive is squeezed between the electronic component and the upper solder mask, the adhesive bleeds laterally outwards past sides of the electronic components.
Abstract: A bleed channel electronic component package includes a substrate having an upper solder mask. To mount an electronic component to the substrate, an inactive surface of the electronic component is placed into an adhesive on the substrate. As the adhesive is squeezed between the electronic component and the upper solder mask, the adhesive bleeds laterally outwards past sides of the electronic component. However, bleed channels are formed in the upper solder mask directly adjacent and around the electronic component. Thus, the adhesive bleed flows into the bleed channels, and is captured therein. In this manner, the lateral spread of the adhesive bleed is minimized.

12 citations


Authors

Showing all 1070 results

NameH-indexPapersCitations
Thomas P. Glenn481306676
Dong-Hoon Lee4876223162
Joungho Kim405797365
Steven Webster34833322
Young Bae Park332164325
Roy Dale Hollaway28532324
Ronald Patrick Huemoeller26912385
Robert Francis Darveaux23701881
MinJae Lee23993083
Il Kwon Shim21411403
Vincent DiCaprio20271973
Sukianto Rusli19441308
Glenn A. Rinne1934898
Ahmer Syed18551192
David Jon Hiner18541173
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20221
202112
202022
201922
201832
201728