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Institution

Amkor Technology

CompanyTempe, Arizona, United States
About: Amkor Technology is a company organization based out in Tempe, Arizona, United States. It is known for research contribution in the topics: Semiconductor package & Substrate (printing). The organization has 1069 authors who have published 1106 publications receiving 26778 citations. The organization is also known as: Amkor & Amkor Technology, Inc..


Papers
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Patent
Thomas P. Glenn1
20 Jan 1999
TL;DR: In this paper, a method and apparatus for protecting hypersensitive microcircuits on the face of a semiconductor wafer from contamination and mechanical damage during die sawing and subsequent die handling operations is presented.
Abstract: A method and apparatus for protecting hypersensitive microcircuits on the face of a semiconductor wafer from contamination and mechanical damage during die sawing and subsequent die handling operations include the provision of a plastic sheet having an array of protective domes formed into it, the array corresponding to the array of microcircuits on the wafer, and the temporary adhesion of the sheet to the face of the wafer such that each die in the wafer is covered by a respective one of the domes, with an associated one of the microcircuits protectively sealed therein. Die sawing is performed with the component side of the wafer facing up, the cut passing between the domes and through the thicknesses of both the domed sheet and the wafer such that each die is separated from the wafer, with a corresponding one other domes still attached to it. The domes may be removed later when the dies are located in a more benign environment by simply peeling them off the die. The invention enables the use of conventional die-handling equipment and results in improved device yield.

49 citations

Patent
11 Jul 2003
TL;DR: In this paper, a semiconductor die is mounted on a die pad connected to at least one lead having an exposed surface, and heat generated by the die within the package may be dissipated through thermal paths including the exposed surfaces.
Abstract: A semiconductor package and a method for fabricating a semiconductor package are disclosed. In one embodiment, the semiconductor package includes an exposed portion of a conductive strap at a package horizontal first surface and exposed surfaces of multiple leads at a package horizontal second surface. A power semiconductor die is mounted on a die pad connected to at least one lead having an exposed surface. Heat generated by the die within the package may be dissipated through thermal paths including the exposed surfaces.

49 citations

Patent
27 Apr 2001
TL;DR: In this paper, metal leadframes, semiconductor packages made using the leadframes and methods of making the leadframe and packages are disclosed, as well as a detailed description of the fabrication process.
Abstract: Metal leadframes, semiconductor packages made using the leadframes, and methods of making the leadframes and packages are disclosed. In one embodiment, the leadframe includes a rectangular frame. A chip pad and a plurality of leads are within the frame. The lower side of the chip pad and the leads includes one or more vertically recessed horizontal surfaces. The upper side of the chip pad may include a groove around a chip mounting region. In a package, the chip pad supports a semiconductor chip electrically connected to the leads. The lower side of the chip pad and leads are exposed at an exterior surface of the package body. Encapsulant material underfills the recessed lower surfaces of the chip pad and leads, thereby locking them to the encapsulant material. A wire may be reliably bonded to the chip pad within the groove formed in the upper side thereof.

49 citations

Proceedings ArticleDOI
25 Jun 2007
TL;DR: In this paper, a SINH creep law was used to characterize the steady state creep behavior of lead-free solder alloys under both shear and tensile loading, and the alloys studied included Sn4.0Ag0.5Cu, Sn3.5Ag, Sn0.7Cu and Sn1.2Ag 0.05Ni.
Abstract: Mechanical testing of solder joint arrays was used to characterize lead-free solder alloys under both shear and tensile loading. The alloys studied included Sn4.0Ag0.5Cu, Sn3.5Ag, Sn0.7Cu, Sn3.0Ag0.5Cu, and Sn1.2Ag0.5Cu0.05Ni. All of the lead-free alloys exhibited time and temperature dependent creep behavior over the entire temperature range from -55 C to 125 C. A SINH creep law was effective in describing the steady state creep behavior over the entire range of conditions. Lead-free alloy strength increases with increasing Ag content. The relative strength of tin-lead versus lead-free alloys depends on the strain rate and temperature regime. At high strain rates and low temperatures, eutectic tin-lead is the strongest alloy. At low strain rates and high temperatures, eutectic tin-lead is the lowest strength alloy. Simulated stress-strain hysteresis loops for both accelerated test and field use conditions showed dramatic differences between the various alloys. Higher Ag content results in a larger stress range but a smaller strain range during temperature cycling.

49 citations

Patent
Thomas P. Glenn1
08 May 2000
TL;DR: In this paper, a key is adapted so as to engage a corresponding key hole in another package stacked there with the same key hole, and the key is inserted in the lid or at the first surface of the package body.
Abstract: Package embodiments for housing an electronic device are disclosed, along with methods of making and interconnecting the packages. The package body may be formed of an injection molded plastic encapsulant. The package body includes a cavity in which the electronic device is contained. A lid extends over the open end of the cavity. Metal leads extend from the package body. A first portion of each lead is at a lower surface of the package body, a second portion of each lead extends vertically adjacent to a peripheral side of the package body, and a third portion of each lead extends over the package lid at a top surface of the package. The package has a key formed in the lid or at the first surface of the package body. The key is adapted so as to engage a corresponding key hole in another package stacked therewith. Abutting leads of the stacked packages form an electrical connection between the packages.

48 citations


Authors

Showing all 1070 results

NameH-indexPapersCitations
Thomas P. Glenn481306676
Dong-Hoon Lee4876223162
Joungho Kim405797365
Steven Webster34833322
Young Bae Park332164325
Roy Dale Hollaway28532324
Ronald Patrick Huemoeller26912385
Robert Francis Darveaux23701881
MinJae Lee23993083
Il Kwon Shim21411403
Vincent DiCaprio20271973
Sukianto Rusli19441308
Glenn A. Rinne1934898
Ahmer Syed18551192
David Jon Hiner18541173
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20221
202112
202022
201922
201832
201728