Amkor Technology

About: Amkor Technology is a company organization based out in Tempe, Arizona, United States. It is known for research contribution in the topics: Semiconductor package & Substrate (printing). The organization has 1069 authors who have published 1106 publications receiving 26778 citations. The organization is also known as: Amkor & Amkor Technology, Inc..

Two-sided wafer escape package

Abstract: A method of forming an electronic component package includes: forming electrically conductive traces for connecting first selected bond pads of a plurality of bond pads on a first surface of an electronic component to corresponding bonding locations formed on a second surface of the electronic component; coupling the first surface of the electronic component to a first surface of a lower dielectric strip; coupling the second surface of the electronic component to a first surface of an upper dielectric strip; forming lower via apertures through the lower dielectric strip to expose second selected bond pads of the plurality of bond pads on the first surface of the electronic component; forming upper via apertures through the upper dielectric strip to expose the bonding locations on the second surface of the electronic component; filling the lower and upper via apertures with an electrically conductive material to form lower and upper vias electrically coupled to the first and second selected bond pads of the plurality of bond pads on the first surface of the electronic component.

Method for making an integrated circuit substrate having embedded passive components

Abstract: A method for making an integrated circuit substrate having embedded passive components provides a reduced cost and compact package for a die and one or more passive components An insulating layer of the substrate is embossed or laser-ablated to generate apertures for insertion of a paste forming the body of the passive component A resistive paste is used to form resistors and a dielectric paste is used for forming capacitors A capacitor plate may be deposited at a bottom of the aperture by using a doped substrate material and activating only the bottom wall of the aperture, enabling plating of the bottom wall without depositing conductive material on the side walls of the aperture Vias may be formed to the bottom plate by using a disjoint structure and conductive paste technology Connection to the passive components may be made by conductive paste-filled channels forming conductive patterns on the substrate

Improving electromagnetic compatibility performance of packages and SiP modules using a conformal shielding solution

Abstract: High-speed digital and wireless devices radiate unintentional electromagnetic noise, which can affect the normal operation of other devices within the same system, causing intra-system electromagnetic interference (EMI) problems, or contribute to the total radiated EMI from the system, resulting in potential system-level EMI issues. PCB and system level shielding may alleviate the system-level EMI between wireless PCB board and the outside environment, but seldom prevent the intra-system EMI within the shielding enclosure. Package and System in Package (SiP) level shielding is desirable to shield the unintended radiation and protect the other circuits on board. Traditionally an external metal lid is employed to isolate the radiation from an IC, but the package cost and the size penalty due to the solder pads for shield attachment make the solution unattractive. In this paper, a new shielding technology for IC packages based on metal spray coating (conformal shielding) is presented. By spraying a conductive material on the sides of the package, a very thin metal layer is constructed around the top and four sides of a package. This very thin sprayed metal layer adds zero penalty to the package size and works similar to a solid metal shielding with very good shielding effectiveness; hence, it is suitable for wireless infrastructure, tele-communications, and high-speed digital applications.

Lead frame used for the fabrication of semiconductor packages and semiconductor package fabricated using the same

Abstract: A lead frame for a semiconductor package including a rectangular lead frame body having a central opening, a plurality of leads arranged at and along each of two or four facing sides of the lead frame body, the leads extending in flush with the lead frame body, and a semiconductor chip mounting plate positioned on a plane not flush with a plane, where the leads are positioned, the semiconductor chip mounting plate being supported by down-set tie bars and provided with at least one groove having a rectangular ring shape while serving to prevent a penetration of moisture and to provide an increased coupling strength for the semiconductor chip mounting plate, the semiconductor chip mounting plate also serving as a heat sink. A ground bridge bar having a rectangular ring shape is arranged between the semiconductor chip mounting plate and the leads and supported by another tie bars. By virtue of the bridge bar, the length of bonding wires is reduced, thereby eliminating the possibility of the bonding wires to be short-circuited. A lead frame having a double down-set structure is also provided. By virtue of the double down-set structure, it is possible to increase the size of the semiconductor chip mounting plate, thereby achieving an improvement in the heat discharge effect.