Amkor Technology

About: Amkor Technology is a company organization based out in Tempe, Arizona, United States. It is known for research contribution in the topics: Semiconductor package & Substrate (printing). The organization has 1069 authors who have published 1106 publications receiving 26778 citations. The organization is also known as: Amkor & Amkor Technology, Inc..

Semiconductor devices and methods of manufacturing semiconductor devices

Abstract: A packaged semiconductor device includes a substrate with first and second opposing major surfaces. A stacked semiconductor device structure is connected to the first major surface and includes a plurality of semiconductor die having terminals. Conductive interconnect structures electrically connect the terminals of the semiconductor dies together. The semiconductor dies are stacked together so that the terminals are exposed, and the stacked semiconductor device structure comprises a stepped profile. The conductive interconnect structures comprise a conformal layer that substantially follows the stepped profile.

Concentrated photovoltaic receiver module with improved optical light guide assembly

Abstract: In accordance with the present invention, there is provided multiple embodiments of a concentrated photovoltaic (CPV) module or package. In each embodiment of the present invention, the CPV module includes a mounting device or holder for use in maintaining an optical member or optical light guide of the module in a prescribed position relative to the solar cell or receiver die thereof.

Market Trends: Past, Present, and Future

Abstract: Flip chip, as the name implies, is a means of chip assembly whereby the chip is attached face down (active Integrated Circuit (IC) side down) to the substrate. Flip chip technology was invented by IBM in 1961 and is now 51 years old. This development allowed IBM to be the leader in producing high performance circuits. The method for production that IBM employed was expensive and limited its widespread use. IBM kept this technology captive until the mid 1990s. As it is well known IBM created the technology for its advanced computing needs. This technology utilized ceramic carriers and was suitable for high power dissipation. Although the original “controlled collapse chip connection,” also known as (C4), concept utilized solder coated copper balls to form the interconnect, high lead (97/3) solder evaporated through a molybdenum stencil became the staple of the technology for decades. IBM kept this technology captive, and the intellectual property (IP) protected and secret for many years past the original Patents useful lifetime.

System level IC packaging - Integration of Key Technologies: TSVs, Interposers, and Advanced IC Packaging

Abstract: New system level IC package integration requires a flexible assembly portfolio. A review of current wafer scale processing and assembly solutions and new development directions is warranted. 2.5D TSV System level IC packaging is not new, but the performance levels that are being attained today with memory stacking, interposers, advanced silicon nodes and advanced packaging are new and are unparalleled. Several key technologies have come together to create this bold shift to higher performance. The Thru-Silicon Via (TSV) technology has been foremost, whether in the interposer, memory or logic devices, the importance of the this electrical pass through connection in silicon cannot be overstated. To commercialize the TSV package constructions, IC packaging technology had to be developed to permit its use. This included TSV reveal on TSV-bearing interposers, new ways of controlling warpage due to the presence of large x-y interposers, new functional IC bumping technologies and attachment methods. This portfol...

Semiconductor device redistribution layer with narrow trace width relative to passivation layer opening

Abstract: A semiconductor device with fine pitch redistribution layers is disclosed and may include a semiconductor die with a bond pad and a first passivation layer comprising an opening above the bond pad. A redistribution layer (RDL) may be formed on the passivation layer with one end of the RDL electrically coupled to the bond pad and a second end comprising a connection region. A second passivation layer may be formed on the RDL with an opening for the connection region of the RDL. An under bump metal (UBM) may be formed on the connection region of the RDL and a portion of the second passivation layer. A bump contact may be formed on the UBM, wherein a width of the RDL is less than a width of the opening in the second passivation layer and may be constant from the bond pad through at least a portion of the opening.