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Computational Aspects of Vlsi

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The article was published on 1984-01-01 and is currently open access. It has received 862 citations till now. The article focuses on the topics: Very-large-scale integration.

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Book ChapterDOI

Hierarchical Homogeneous Topologies

TL;DR: This chapter introduces a first class of hierarchical systems: the simplest way to assemble a hierarchy is to link identical modules, thus giving rise to homo- geneous systems.
Proceedings ArticleDOI

Parallel algorithm for direct domination on nonoverlapping rectangles

TL;DR: The author presents a parallel algorithm for a computational geometry problem which is motivated by the constraint graph used in compaction of VLSI circuits, and has time complexity O(log/sup 2/ n), using n/log n processors, in the CREW-PRAM (parallel random access machine) model.
Journal ArticleDOI

The area-time complexity of the greatest common divisor problem: a lower bound

TL;DR: It is shown that any VLSI chip which computes the greatest common divisor (GCD) of two n -bit binary integers requires area A and time T satisfying AT 2 = Ω(n 2 ) .

Layout optimisation for yield enhancement in on-c h i p-VLS IPS I para I le I processing

P. Mazumder
TL;DR: The paper investigates the layout opti- misation problem for processor-array networks, and a formal technique of cellular layout by polyomino tiles is proposed, with application to mapping a variety of processor geometries onto specific array networks.
Proceedings Article

The Organization of Permutation Architectures with Bussed Interconnections (Extended Abstract)

TL;DR: This paper explores the problem of efficiently permuting data stored in VLSI chips in accordance with a predetermined set of permutations by connecting chips with shared bus interconnections, as opposed to point-to-point interConnections, and shows that the number of pins per chip can often be reduced.