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Computational Aspects of Vlsi

Jeffrey D Ullma
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The article was published on 1984-01-01 and is currently open access. It has received 862 citations till now. The article focuses on the topics: Very-large-scale integration.

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Citations
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Towards optimal circuit layout using advanced search techniques

Anthony Vannelli, +1 more
TL;DR: It is shown in this thesis that new hybrid partitioning techniques based on the above mentioned heuristics outperform traditional heuristic methods and consistently find better solutions than other methods in a fraction of the time.

Detection algorithms and architectures for wireless spatial multiplexing in MIMO-OFDM systems

M. Myllyla
TL;DR: This thesis considers the linear minimum mean square error (LMMSE) criterion based detectors and more advanced LSDs for detection of SM transmission and designs pipelined systolic array architecture for LMMSE detector algorithms and efficient architectures with given algorithm properties for the LSD algorithms.
Journal ArticleDOI

Parallel algorithms for computing linked list prefix

Yijie Han
- 01 Jun 1989 - 
TL;DR: A deterministic algorithm for computing a linked list prefix on a completely connected parallel computation model is obtained by applying vector balancing techniques and is optimal when n {ge}rho log rho.
Proceedings ArticleDOI

A systolic array implementation of common factor algorithm to compute DFT

Shousheng He, +1 more
TL;DR: An extension to the common factor algorithm, CFA, to compute discrete Fourier transform, DFT, under the condition that the site of the transform is N=M/sup 2/, shows that the input and output data array of the Transform may have identical index mapping.
Book ChapterDOI

Plastic Cell Architecture: A Dynamically Reconfigurable Hardware-Based Computer

Hiroshi Nakada, +7 more
TL;DR: This paper describes a dynamically reconfigurable hardware-based computer called the Plastic Cell Architecture (PCA), which consists of dualstructured sea-of-cells that consist of a built-in part and a plastic part that looks like an SRAM-based FPGA.