Institution
Agilent Technologies
Company•Santa Clara, California, United States•
About: Agilent Technologies is a company organization based out in Santa Clara, California, United States. It is known for research contribution in the topics: Signal & Mass spectrometry. The organization has 7398 authors who have published 11518 publications receiving 262410 citations. The organization is also known as: Agilent Technologies, Inc..
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Papers
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21 Mar 2010TL;DR: In this article, a real-time all-optical FFT receiver for OFDM data with line rates of 5.4 Tbit/s or 10.8 T bit/s is presented.
Abstract: OFDM data with line rates of 5.4 Tbit/s or 10.8 Tbit/s are generated and decoded with a new real-time all-optical FFT receiver. Each of 75 carriers of a comb source is encoded with 18 GBd QPSK or 16-QAM.
93 citations
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14 Dec 2001TL;DR: In this paper, the authors describe a class of micro-fluid devices, which are characterized by the presence of at least one micro-valve comprising a phase reversible material, e.g. a reversible gel, that reversibly changes its physical state in response to an applied stimulus.
Abstract: Micro-fluid devices and methods for their use are provided. The subject devices are characterized by the presence of at least one micro-valve comprising a phase reversible material, e.g. a reversible gel, that reversibly changes its physical state in response to an applied stimulus, e.g. a thermoreversible gel. In using the subject device, fluid flow along a flow path of the device is modulated by applying an appropriate stimulus, e.g. changing the temperature, to the microvalve. The subject devices find use in a variety of applications, including micro-analytical applications.
93 citations
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08 Apr 1999TL;DR: In this article, a multivariable artifact assessment is used to detect corruption of an event signal by two or more non-event artifacts by using multivariable artifacts assessment.
Abstract: An apparatus detects corruption of an event signal by two or more non-event artifacts by using multivariable artifact assessment. The apparatus comprises: 1) a sensor for providing an input signal comprising an event signal coexisting with two or more non-event signals, 2) a measurement system including a receiver for receiving the input signal from the sensor and separating the received input signal into its constituent parts, 3) detectors for detecting both the event signal and non-event signals from the received input signal, and 4) an inference processor for analyzing the correlation signals to produce an indication of signal corruption. In a second embodiment, the apparatus comprises: 1) a plurality of sensors for providing additional non-event input signals, 2) a corresponding measurement system having a plurality of receivers for receiving the additional input signals, 3) detectors for detecting the non-event signals from the received additional input signals, 4) correlators for comparing the detected event signal with each of the detected non-event signals to produce respective correlation signals, and 5) an inference processor for analyzing the correlation signals to produce an indication of signal corruption. The apparatus may be a patient monitoring system or a defibrillator. Methods of operating the apparatus are also described.
93 citations
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TL;DR: Overall decreasing trends of PFCs contaminations with depth in the top 10cm surface sediments of these rivers are presented.
93 citations
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TL;DR: The problem of optimally sizing the decoder chain with RC interconnect is analyzed and the optimum fan-out is found to be about 4, just as in the case of a simple buffer chain, which provides for an efficient mechanism to trade off speed and power.
Abstract: Decoder design involves choosing the optimal circuit style and figuring out their sizing, including adding buffers if necessary. The problem of sizing a simple chain of logic gates has an elegant analytical solution, though there have been no corresponding analytical results until now which include the resistive effects of the interconnect. Using simple RC models, we analyze the problem of optimally sizing the decoder chain with RC interconnect and find the optimum fan-out to be about 4, just as in the case of a simple buffer chain. As in the simple buffer chain, supporting a fan-out of 4 often requires noninteger number of stages in the chain. Nevertheless, this result is used to arrive at a tight lower bound on the delay of a decoder. Two simple heuristics for sizing of real decoder with integer stages are examined. We evaluate a simple technique to reduce power, namely, reducing the sizes of the inputs of the word drivers, while sizing each of the subchains for maximum speed, and find that it provides for an efficient mechanism to trade off speed and power. We then use the RC models to compare different circuit techniques in use today and find that decoders with two input gates for all stages after the predecoder and pulse mode circuit techniques with skewed N to P ratios have the best performance.
93 citations
Authors
Showing all 7402 results
Name | H-index | Papers | Citations |
---|---|---|---|
Hongjie Dai | 197 | 570 | 182579 |
Zhuang Liu | 149 | 535 | 87662 |
Jie Liu | 131 | 1531 | 68891 |
Thomas Quertermous | 103 | 405 | 52437 |
John E. Bowers | 102 | 1767 | 49290 |
Roy G. Gordon | 89 | 449 | 31058 |
Masaru Tomita | 76 | 677 | 40415 |
Stuart Lindsay | 74 | 347 | 22224 |
Ron Shamir | 74 | 319 | 23670 |
W. Richard McCombie | 71 | 144 | 64155 |
Tomoyoshi Soga | 71 | 392 | 21209 |
Michael R. Krames | 65 | 321 | 18448 |
Shabaz Mohammed | 64 | 188 | 17254 |
Geert Leus | 62 | 609 | 19492 |
Giuseppe Gigli | 61 | 541 | 15159 |