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Open AccessJournal ArticleDOI

Germanium Based Field-Effect Transistors: Challenges and Opportunities

Patrick S. Goley, +1 more
- 19 Mar 2014 - 
- Vol. 7, Iss: 3, pp 2301-2339
TLDR
This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack.
Abstract
The performance of strained silicon (Si) as the channel material for today's metal-oxide-semiconductor field-effect transistors may be reaching a plateau. New channel materials with high carrier mobility are being investigated as alternatives and have the potential to unlock an era of ultra-low-power and high-speed microelectronic devices. Chief among these new materials is germanium (Ge). This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack. Next, Ge is compared to compound III-V materials in terms of p-channel device performance to review how it became the first choice for PMOS devices. Different Ge device architectures, including surface channel and quantum well configurations, are reviewed. Finally, state-of-the-art Ge device results and future prospects are also discussed.

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Citations
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High-K materials and metal gates for CMOS applications

TL;DR: In this article, a review of the high-K gate stack is presented, including the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure, their electronic structure, band offsets, electronic defects, charge trapping and conduction mechanisms, reliability, mobility degradation and oxygen scavenging.
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Synthesis and Characterization of Hexagonal Boron Nitride as a Gate Dielectric

TL;DR: An interesting coincidence of a critical thickness of 10 nm was identified in both the CVD growth behavior and in the breakdown electric field strength and leakage current mechanism, indicating that the electrical properties of the cVD h-BN film depended significantly on the film growth mode and the resultant film quality.
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Enabling Energy Efficiency and Polarity Control in Germanium Nanowire Transistors by Individually Gated Nanojunctions

TL;DR: Finite-element drift-diffusion simulations reveal that both leakage current suppression and polarity control can also be achieved at highly scaled geometries, providing solutions for future energy-efficient systems.
Journal ArticleDOI

Ultra-doped n-type germanium thin films for sensing in the mid-infrared

TL;DR: Ion implantation followed by rear side flash-lamp annealing (r-FLA) is used for the fabrication of heavily doped n-type Ge with high mobility, which enables to exploit the plasmonic properties of Ge for sensing in the mid-infrared spectral range.
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Bending induced electrical response variations in ultra-thin flexible chips and device modeling

TL;DR: In this paper, the effects of bending on the response of devices on ultra-thin chips in terms of variations in electrical parameters such as mobility, threshold voltage, and device performance (static and dynamic).
References
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Journal ArticleDOI

Ultrathin low temperature SiGe buffer for the growth of high quality Ge epilayer on Si(100) by ultrahigh vacuum chemical vapor deposition

TL;DR: In this article, a method to grow high quality strain-relaxed Ge on a combination of low-temperature Ge seed layer on low temperature ultrathin Si0.8Ge0.2 buffer with thickness of 27.3nm by ultrahigh vacuum/chemical vapordeposition method without the need to use chemical mechanical polish or high temperature annealing.
Journal ArticleDOI

High-Mobility Ge N-MOSFETs and Mobility Degradation Mechanisms

TL;DR: In this article, the authors investigated the mechanisms responsible for poor Ge NMOS performance in the past with detailed gate dielectric stack characterizations and Hall mobility analysis, and they identified the major mechanisms behind poor GeNMOS performance have not been completely understood yet.
Journal ArticleDOI

Fabrication of high-quality p-MOSFET in Ge grown heteroepitaxially on Si

TL;DR: In this article, high performance p-MOSFETs in germanium grown directly on Si using a novel heteroepitaxial growth technique, which uses multisteps of hydrogen annealing and growth to confine misfit dislocations near the Ge-Si interface, thus not threading to the surface as expected.
Proceedings ArticleDOI

Heterogeneous integration of enhancement mode in 0.7 ga 0.3 as quantum well transistor on silicon substrate using thin (les 2 μm) composite buffer architecture for high-speed and low-voltage ( 0.5 v) logic applications

TL;DR: In this article, the authors describe the heterogeneous integration of In0.7Ga0.3As QWFETs on Si substrate for future high-speed digital logic applications at low supply voltage such as 0.5 V.
Journal ArticleDOI

Low surface roughness and threading dislocation density Ge growth on Si (0 0 1)

TL;DR: In this paper, the root-mean-square roughness of the 3-cycle sample is in the range of 0.4-0.6-nm for 10×10-μm 2 scan field atomic force microscopy (AFM) images.
Trending Questions (1)
What are the challenges and opportunities in the field of Ge optics?

The provided paper does not discuss the challenges and opportunities in the field of Ge optics. The paper focuses on the challenges and opportunities of germanium-based field-effect transistors.