Germanium Based Field-Effect Transistors: Challenges and Opportunities
Patrick S. Goley,Mantu K. Hudait +1 more
TLDR
This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack.Abstract:
The performance of strained silicon (Si) as the channel material for today's metal-oxide-semiconductor field-effect transistors may be reaching a plateau. New channel materials with high carrier mobility are being investigated as alternatives and have the potential to unlock an era of ultra-low-power and high-speed microelectronic devices. Chief among these new materials is germanium (Ge). This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack. Next, Ge is compared to compound III-V materials in terms of p-channel device performance to review how it became the first choice for PMOS devices. Different Ge device architectures, including surface channel and quantum well configurations, are reviewed. Finally, state-of-the-art Ge device results and future prospects are also discussed.read more
Citations
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High-K materials and metal gates for CMOS applications
John Robertson,Robert M. Wallace +1 more
TL;DR: In this article, a review of the high-K gate stack is presented, including the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure, their electronic structure, band offsets, electronic defects, charge trapping and conduction mechanisms, reliability, mobility degradation and oxygen scavenging.
Journal ArticleDOI
Synthesis and Characterization of Hexagonal Boron Nitride as a Gate Dielectric
TL;DR: An interesting coincidence of a critical thickness of 10 nm was identified in both the CVD growth behavior and in the breakdown electric field strength and leakage current mechanism, indicating that the electrical properties of the cVD h-BN film depended significantly on the film growth mode and the resultant film quality.
Journal ArticleDOI
Enabling Energy Efficiency and Polarity Control in Germanium Nanowire Transistors by Individually Gated Nanojunctions
Jens Trommer,Andre Heinzig,Uwe Mühle,Uwe Mühle,Markus Löffler,Annett Winzer,Paul M. Jordan,Jurgen Beister,Tim Baldauf,Marion Geidel,B. Adolphi,Ehrenfried Zschech,Thomas Mikolajick,Walter M. Weber +13 more
TL;DR: Finite-element drift-diffusion simulations reveal that both leakage current suppression and polarity control can also be achieved at highly scaled geometries, providing solutions for future energy-efficient systems.
Journal ArticleDOI
Ultra-doped n-type germanium thin films for sensing in the mid-infrared
Slawomir Prucnal,Fang Liu,Matthias Voelskow,Lasse Vines,Lars Rebohle,Denny Lang,Yonder Berencén,Stefan Andric,Roman Boettger,Manfred Helm,Manfred Helm,Shengqiang Zhou,Wolfgang Skorupa +12 more
TL;DR: Ion implantation followed by rear side flash-lamp annealing (r-FLA) is used for the fabrication of heavily doped n-type Ge with high mobility, which enables to exploit the plasmonic properties of Ge for sensing in the mid-infrared spectral range.
Journal ArticleDOI
Bending induced electrical response variations in ultra-thin flexible chips and device modeling
TL;DR: In this paper, the effects of bending on the response of devices on ultra-thin chips in terms of variations in electrical parameters such as mobility, threshold voltage, and device performance (static and dynamic).
References
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Journal ArticleDOI
Ge/GeO2 Interface Control with High-Pressure Oxidation for Improving Electrical Characteristics
TL;DR: In this article, high pressure oxidation (HPO) of germanium (Ge) for improving electrical properties of Ge/GeO2 stacks was investigated, which revealed improved electrical properties without any post-deposition annealing, and the interface states density was reduced to 2×1011 eV-1 cm-2 near the midgap.
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Gate dielectric formation and MIS interface characterization on Ge
Shinichi Takagi,Tatsuro Maeda,Noriyuki Taoka,M. Nishizawa,Yukinori Morita,K. Ikeda,Y. Yamashita,M. Nishikawa,Hiroshi Kumagai,Ryosho Nakane,Satoshi Sugahara,N. Sugiyama +11 more
TL;DR: In this article, the physical and electrical properties of Ge MIS interfaces fabricated by direct oxidation and nitridation of Ge surfaces are reviewed and compared on gate stacks composing of HfO"2 and the nitrided Ge surfaces.
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Optimisation of a thin epitaxial Si layer as Ge passivation layer to demonstrate deep sub-micron n- and p-FETs on Ge-On-Insulator substrates
B. De Jaeger,Renaud Bonzom,Frederik Leys,O. Richard,J. Van Steenbergen,Gillis Winderickx,E. Van Moorhem,G. Raskin,Fabrice Letertre,T. Billon,Marc Meuris,M.M. Heyns +11 more
TL;DR: In this article, a thin epitaxially grown Si layer is used as the high-k dielectric to obtain low interface state density and high carrier mobility for Ge MOSFETs.
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High-mobility low band-to-band-tunneling strained-Germanium double-gate heterostructure FETs: Simulations
Tejas Krishnamohan,Donghyun Kim,C.D. Nguyen,Christoph Jungemann,Yoshio Nishi,Krishna C. Saraswat +5 more
TL;DR: In this article, a double-gate FET (DGFET) was proposed to reduce BTBT leakage currents while retaining its high mobility, making it suitable for scaling into the sub-20-nm regime.
Journal ArticleDOI
Thermal decomposition pathway of Ge and Si oxides: observation of a distinct difference
TL;DR: In this paper, a comparison of the thermal decomposition pathways of ultrathin oxide layers, formed on Ge (100) and Si(100) surfaces, as revealed by photoemission studies, employing synchrotron radiation.