Germanium Based Field-Effect Transistors: Challenges and Opportunities
Patrick S. Goley,Mantu K. Hudait +1 more
TLDR
This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack.Abstract:
The performance of strained silicon (Si) as the channel material for today's metal-oxide-semiconductor field-effect transistors may be reaching a plateau. New channel materials with high carrier mobility are being investigated as alternatives and have the potential to unlock an era of ultra-low-power and high-speed microelectronic devices. Chief among these new materials is germanium (Ge). This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack. Next, Ge is compared to compound III-V materials in terms of p-channel device performance to review how it became the first choice for PMOS devices. Different Ge device architectures, including surface channel and quantum well configurations, are reviewed. Finally, state-of-the-art Ge device results and future prospects are also discussed.read more
Citations
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High-K materials and metal gates for CMOS applications
John Robertson,Robert M. Wallace +1 more
TL;DR: In this article, a review of the high-K gate stack is presented, including the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure, their electronic structure, band offsets, electronic defects, charge trapping and conduction mechanisms, reliability, mobility degradation and oxygen scavenging.
Journal ArticleDOI
Synthesis and Characterization of Hexagonal Boron Nitride as a Gate Dielectric
TL;DR: An interesting coincidence of a critical thickness of 10 nm was identified in both the CVD growth behavior and in the breakdown electric field strength and leakage current mechanism, indicating that the electrical properties of the cVD h-BN film depended significantly on the film growth mode and the resultant film quality.
Journal ArticleDOI
Enabling Energy Efficiency and Polarity Control in Germanium Nanowire Transistors by Individually Gated Nanojunctions
Jens Trommer,Andre Heinzig,Uwe Mühle,Uwe Mühle,Markus Löffler,Annett Winzer,Paul M. Jordan,Jurgen Beister,Tim Baldauf,Marion Geidel,B. Adolphi,Ehrenfried Zschech,Thomas Mikolajick,Walter M. Weber +13 more
TL;DR: Finite-element drift-diffusion simulations reveal that both leakage current suppression and polarity control can also be achieved at highly scaled geometries, providing solutions for future energy-efficient systems.
Journal ArticleDOI
Ultra-doped n-type germanium thin films for sensing in the mid-infrared
Slawomir Prucnal,Fang Liu,Matthias Voelskow,Lasse Vines,Lars Rebohle,Denny Lang,Yonder Berencén,Stefan Andric,Roman Boettger,Manfred Helm,Manfred Helm,Shengqiang Zhou,Wolfgang Skorupa +12 more
TL;DR: Ion implantation followed by rear side flash-lamp annealing (r-FLA) is used for the fabrication of heavily doped n-type Ge with high mobility, which enables to exploit the plasmonic properties of Ge for sensing in the mid-infrared spectral range.
Journal ArticleDOI
Bending induced electrical response variations in ultra-thin flexible chips and device modeling
TL;DR: In this paper, the effects of bending on the response of devices on ultra-thin chips in terms of variations in electrical parameters such as mobility, threshold voltage, and device performance (static and dynamic).
References
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Effects of fluorine incorporation and forming gas annealing on high-k gated germanium metal-oxide-semiconductor with GeO2 surface passivation
TL;DR: In this paper, a pregate surface passivation and postgate treatments including CF4-plasma treatment and forming gas annealing are employed to make high quality HfO2 gated germanium MOS capacitors.
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The Influence of the Epitaxial Growth Process Parameters on Layer Characteristics and Device Performance in Si-passivated Ge pMOSFETs
Matty Caymax,Frederik Leys,Jerome Mitard,Koen Martens,Lijun Yang,Geoffrey Pourtois,Wilfried Vandervorst,Marc Meuris,Roger Loo +8 more
TL;DR: In this article, the authors investigated how the performance of a 65 nm Ge p-channel MOSFET depends on the characteristics of this Si layer and found that surface segregation of Ge through the Si layer takes place during the growth.
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Surfactant-mediated epitaxy of relaxed low-doped Ge films on Si(001) with low defect densities
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High conductance Ge p-channel heterostructures realized by hybrid epitaxial growth
Richard J. H. Morris,T.J. Grasby,R. Hammond,Maksym Myronov,O. A. Mironov,David R. Leadley,Terry E. Whall,Evan H. C. Parker,M T Currie,C. W. Leitz,Eugene A. Fitzgerald +10 more
TL;DR: In this paper, a hybrid-epitaxial growth of Si0.4Ge p-channel heterostructures was realized by hybrid PE growth and Hall effect measurements revealed a hole mobility of 1900 cm2 V−1 s−1 at 300 K.
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Thickness Dependence of Hole Mobility in Ultrathin SiGe-Channel p-MOSFETs
TL;DR: In this article, a fundamental understanding of the mechanisms responsible for the dependence of hole mobility on SiGe channel layer thickness is presented for channel thicknesses down to 1.8 nm.