Motorola

About: Motorola is a company organization based out in Schaumburg, Illinois, United States. It is known for research contribution in the topics: Signal & Communications system. The organization has 27298 authors who have published 38274 publications receiving 968710 citations. The organization is also known as: Motorola, Inc. & Galvin Manufacturing Corporation.

Configuration relocation and defragmentation for run-time reconfigurable computing

Abstract: Due to its potential to greatly accelerate a wide variety of applications, reconfigurable computing has become a subject of a great deal of research. By mapping the compute-intensive sections of an application to reconfigurable hardware, custom computing systems exhibit significant speedups over traditional microprocessors. However, this potential acceleration is limited by the requirement that the speedups provided must outweigh the considerable cost of reconfiguration. The ability to relocate and defragment configurations on field programmable gate arrays (FPGAs) can dramatically decrease the overall reconfiguration overhead incurred by the use of the reconfigurable hardware. We therefore present hardware solutions to provide relocation and defragmentation support with a negligible area increase over a generic partially reconfigurable FPGA, as well as software algorithms for controlling this hardware. This results in factors of 8 to 12 improvement in the configuration overheads displayed by traditional serially programmed FPGAs.

User-configurable priority list for mobile device electronic payment applications

Abstract: A mobile device as disclosed herein can support a plurality of electronic payment applications such as credit and/or debit applications. During a payment transaction, the mobile device communicates a priority list of the electronic payment applications to a point of sale terminal, which then selects one of the applications for completion of the payment transaction, where the selection is governed by the priority list. The data structure corresponding to the priority list is configured such that the end user of the mobile device has management access rights to at least some of the electronic payment applications. Such end user management access rights can be used to modify the relative priority of the electronic payment applications.

System and method for building wireless applications with intelligent mapping between user interface and data components

Abstract: A system and method for generating a screen element, based on a data object, of a component application is disclosed. The component application includes a data component having a data field definition and a screen component having a screen element definition. A mapping manager identifies a mapping present in the screen component. The mapping specifies dynamic relationships between the screen component and the data component by an identifier, and for selecting the data component mapped by the mapping according to the mapping identifier. The mapping manager maintains dynamic integrity and automatically synchronizes changes between the screen component and the corresponding data component. A data manager obtains a data object field value corresponding to the data field definition of the mapped data component; and a presentation manager generates a screen element from the screen element definition to include the data object field value.

Digital speech coder having optimized signal energy parameters

Abstract: A speech coder and decoder methodology wherein pitch excitation and codebook excitation source energies (100) are represented by parameters that are readily transmissible with minimal transmission capacity requirements. The parameters are the long term energy value, a short term correction factor which is applied to the long term energy value to match the short term energy, and proportionality factor(s) that specify the relative energy contribution of the excitation sources to the short term energy value (101).

Data Processor having a built-in internal self test controller for testing a plurality of memories internal to the data processor

Abstract: A data processor (10) has a single test controller (11). The test controller (11) has a test pattern generator portion (26) and a memory verification element (27). The test pattern generator (26) generates and communicates a plurality of test patterns to the plurality of memories (12, 13, and 14) through a second storage device (17). A first storage device (16) is used to store data read from the plurality of memories (12, 13, and 14). The data from the first storage device is selectively accessed by the memory verification element (27) via the bus (31). A bit (32) or more than one bit is used to communicate to external to the processor (10) whether the memories (12, 13, and 14) are operating in an error free manner.