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Understanding Delta-Sigma Data Converters

TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Proceedings ArticleDOI

Hardware complexity of a correlation based background DAC error estimation technique for sigma-delta ADCs

TL;DR: This paper presents different alternatives for a hardware realization of a previously proposed correlation based background error estimation and correction technique used to linearize the unit elements in the feedback DAC of a ΔΣ analog-to-digital converter.
Proceedings ArticleDOI

A 10-GS/s multibit delta-sigma analog-to-digital converter in an InP HBT technology

TL;DR: This work presents a multibit lowpass ΔΣ ADC based upon the InP HBT technology, which incorporates an internal resolution of 2 bits.
Patent

Delta-sigma modulator and communication device

TL;DR: In this article, a delta-sigma modulator capable of outputting an output signal including a plurality of signals having different frequencies was proposed, where a quantizer was used to quantize an output of the adder.
Proceedings ArticleDOI

An information theoretic technique for harnessing attenuation of high spatial frequencies to design ultra-high-density EEG

TL;DR: This work proposes an information-theoretic strategy to harness this decay of high-spatial frequencies to reduce circuit area and energy needed for high-resolution signal acquisition.
DissertationDOI

Compressed Sensing Receivers: Theory, Design, and Performance Limits

Juhwan Yoo
TL;DR: This work presents a system-level approach with the goal of minimizing the required digitization rate for observation of a given effective instantaneous bandwidth (EIBW) and was inspired by the field of compressed sensing.
References
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Journal ArticleDOI

A higher order topology for interpolative modulators for oversampling A/D converters

TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI

Decimation for Sigma Delta Modulation

TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI

An analysis of nonlinear behavior in delta - sigma modulators

TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI

The Structure of Quantization Noise from Sigma-Delta Modulation

TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI

A fourth-order bandpass sigma-delta modulator

TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.