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Understanding Delta-Sigma Data Converters
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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.Abstract:
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.read more
Citations
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Journal ArticleDOI
A 178.9-dB FoM 128-dB SFDR VCO-Based AFE for ExG Readouts With a Calibration-Free Differential Pulse Code Modulation Technique
Jiannan Huang,Patrick P. Mercier +1 more
TL;DR: In this paper, a voltage-controlled oscillator (VCO)-based analog front end (AFE) for ExG readout applications with both a wide dynamic range (DR) and high linearity is presented.
Journal ArticleDOI
A Switched Capacitor-Based SAR ADC Employing a Passive Reference Charge Sharing and Charge Accumulation Technique
TL;DR: A switched capacitor-based successive approximation register (SAR) analog-to-digital converter (ADC) using a passive reference charge sharing and charge accumulation is proposed, which is a significant improvement over conventional binary-weighted SAR ADC.
Proceedings ArticleDOI
Networked electrophysiology sensor-on-a-chip
Tsai Chen,John A. McNeill +1 more
TL;DR: A novel second order sigma-delta (ΣΔ) analog-to-digital converter (ADC) is used to program the low-frequency cutoff, and to enable an input common mode range of ±0.3 V.
Journal ArticleDOI
A single-bit continuous-time delta-sigma modulator using clock-jitter and inter-symbol-interference suppression technique
TL;DR: Circuit simulations in 180-nm CMOS technology show that in the presence of circuit non-idealities which generate jitter and asymmetrical rise and fall times in the DAC current pulse, signal-to-noise-distortion-ratio SNDR of the proposed modulator is higher than the conventional modulator with NRZ waveform by about 10dB.
Integrated CMOS Current Sensing Systems for Coulomb Counters
TL;DR: In this article, the authors used coulomb counting to estimate the battery state-of-charge (SoC) using the current of the battery to determine its net charge flow.
References
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Journal ArticleDOI
A higher order topology for interpolative modulators for oversampling A/D converters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI
Decimation for Sigma Delta Modulation
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI
An analysis of nonlinear behavior in delta - sigma modulators
Sasan H. Ardalan,J.J. Paulos +1 more
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI
The Structure of Quantization Noise from Sigma-Delta Modulation
James C. Candy,O. Benjamin +1 more
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI
A fourth-order bandpass sigma-delta modulator
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.