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Understanding Delta-Sigma Data Converters
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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.Abstract:
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.read more
Citations
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Proceedings ArticleDOI
Technical Review: Neural Recording Circuits for Bidirectional Neural Interface
TL;DR: In this paper, state-of-the-art designs for low-power high-performance neural recording circuits are reviewed with an emphasis on the circuit techniques employed for achieving large dynamic range.
Proceedings ArticleDOI
Study of Sigma-Delta Modulator for Underwater Acoustic Amplifier
Yongheng Wang,Dajun Sun +1 more
TL;DR: Compared with PWM modulator, Sigma- Delta modulator has the features of high output signal-to-noise ratio (SNR), high work efficiency and low total harmonic distortion (THD) and has splendid application value.
Proceedings ArticleDOI
SAR ADCs in parallel [time-interleaved] converter arrays
TL;DR: In this article, time-interleaved SAR ADCs are a major focus of active development and power and area efficiency of SAR architecture suit itself very well to interleaving.
Design and FPGA Implementation of a 2 nd Order
TL;DR: The design and FPGA implementation of a 2 nd order all-digital Adaptive Delta Sigma (∆∑) modulator with one bit quantization with an increase in the overall Signal to Quantization Noise Ratio (SQNR) of the modulator is presented.
Proceedings ArticleDOI
A digital calibration technique combined with DWA for multibit ΣΔ ADCs
Hossein Pakniat,Mohammad Yavari +1 more
TL;DR: A purely digital correction technique combined with data weighted averaging (DWA) algorithm is presented to overcome the digital-to-analog converter's (DAC's) mismatch-induced errors in multibit ΣΔ modulators.
References
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Journal ArticleDOI
A higher order topology for interpolative modulators for oversampling A/D converters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI
Decimation for Sigma Delta Modulation
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI
An analysis of nonlinear behavior in delta - sigma modulators
Sasan H. Ardalan,J.J. Paulos +1 more
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI
The Structure of Quantization Noise from Sigma-Delta Modulation
James C. Candy,O. Benjamin +1 more
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI
A fourth-order bandpass sigma-delta modulator
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.