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Understanding Delta-Sigma Data Converters
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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.Abstract:
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.read more
Citations
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Proceedings ArticleDOI
A second-order low-power ΔΣ modulator for pressure sensor applications
Tero Nieminen,Kari Halonen +1 more
TL;DR: An 1-bit second-order low-power ΔΣ modulator for pressure sensor applications is presented that utilizes correlated double-sampling (CDS) in order to reduce the flicker (1/f) noise.
Proceedings ArticleDOI
A 0.8 V Low-Power 3rd order Sigma-Delta Modulator in 22 nm FDSOI CMOS Process for Sensor Interfaces
TL;DR: The design of a low-power 3rd order sigma-delta (ΣΔ) modulator targeted for sensor applications is presented, which achieves a peak signal-to-noise-and-distortion ratio (SNDR) of 89 dB and a dynamic range of 94 dB.
Proceedings ArticleDOI
A 16-bit 312.5-kHz bandwidth fourth-order one-bit switched-capacitor sigma-delta modulator
TL;DR: In this paper, a high-resolution medium-frequency single-loop fourth-order 1-bit sigma-delta modulator is implemented in 0.18µm CMOS technology and the experimental results show a figure-of-merit (FOM) of 170.27dB.
Journal ArticleDOI
Comparative study of sigma delta and nonuniform sampling A/D converters
TL;DR: It is found that the first-order Σ Δ ADC has inferior performance as compared to NUSADC, while the second-orders can achieve equivalent SQNR values, which are nearly equal to that of the N USADC with less computational cost.
Patent
Enhanced resolution successive-approximation register analog-to-digital converter and method
TL;DR: In this article, an enhanced resolution successive-approximation register (SAR) analog-to-digital converter (ADC) is provided that includes a digital-toanalog converter (DAC), a comparator and enhanced resolution SAR control logic.
References
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Journal ArticleDOI
A higher order topology for interpolative modulators for oversampling A/D converters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI
Decimation for Sigma Delta Modulation
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI
An analysis of nonlinear behavior in delta - sigma modulators
Sasan H. Ardalan,J.J. Paulos +1 more
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI
The Structure of Quantization Noise from Sigma-Delta Modulation
James C. Candy,O. Benjamin +1 more
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI
A fourth-order bandpass sigma-delta modulator
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.