scispace - formally typeset
Open AccessBook

Understanding Delta-Sigma Data Converters

TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

read more

Content maybe subject to copyright    Report

Citations
More filters
Proceedings ArticleDOI

A low noise new switching scheme inverter with simple voltage control function

TL;DR: In this article, a power source is rectified to DC and then converted to AC to stabilize output voltage, but this method raises large switching noise peaks at multiple numbers of carrier frequency, and this is undesirable.
Journal ArticleDOI

Noise-Shaping Cyclic ADC Architecture

TL;DR: An ADC architecture comprising a pipelined cyclic ADC and continuous-time delta-sigma ADC provides high resolution at medium speed, with small power requirements and is one of ADC architecture candidates with good tradeoff for high resolution, medium speed and small power.
Proceedings Article

Synchronization of Sigma Delta Modulators

TL;DR: The paper deals with the synchronization of two chaotic Sigma-Delta Modulators, a system that could be used for chaotic encryption and genetic algorithms with which all the states of the original system can be reconstructed with only partial information.
Proceedings ArticleDOI

A hardware-effective digital decimation filter implementation for 24-bit ΔΣ ADC

TL;DR: A hardware-effective digital decimation filter implementation used in the 24-bit ΔΣ ADC for audio application is described in this paper and is well suited for VLSI and can be applied to many other high resolution Δ΢ ADC.
References
More filters
Journal ArticleDOI

A higher order topology for interpolative modulators for oversampling A/D converters

TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI

Decimation for Sigma Delta Modulation

TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI

An analysis of nonlinear behavior in delta - sigma modulators

TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI

The Structure of Quantization Noise from Sigma-Delta Modulation

TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI

A fourth-order bandpass sigma-delta modulator

TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.