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Understanding Delta-Sigma Data Converters

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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Proceedings Article

Dynamic element matching using simultaneity tow different techniques for multibit Delta Sigma Modulator

TL;DR: A modified tone free partitioned Data Weighted Averaging (DWA) structure combined with Noise Shaping Dynamic Element Matching (NSDEM) technique to decrease the mismatch noise and remove DAC nonlinearity error is presented.
Proceedings ArticleDOI

BandPass Dynamic Element Matching for low OSR high resolution Delta Sigma Modulators

TL;DR: The proposed mismatched shaping method achieve a considerably better performance for a low OSR fourth order bandpass multibit Delta Sigma modulator and remove DAC nonlinearity error, as well as improving both SNDR and SFDR of the DAC, reaching their ideal values.

Integrated Readout Circuit for Cross-Correlation Based Ultrasonic Ranging

TL;DR: This thesis investigates the possibility of processing ultrasonic signals with a ?
Book ChapterDOI

Limitations of Delta-Sigma Converters

TL;DR: This chapter gives a brief overview of A/D-conversion focusing on delta-sigma modulators and the principle of oversampling and delta- sigma conversion is covered followed by some architectural aspects and implementation approaches.

A high-resolution self-timed zero-crossing-based Incremental ?? ADC

G. Karykis
TL;DR: This thesis focuses on the systematic noise and linearity design of the first ZCB integrator of the self-timed ADC, building on the implementation of C.Chen et.al's state-of-the-art ?? ADC design.
References
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Journal ArticleDOI

A higher order topology for interpolative modulators for oversampling A/D converters

TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI

Decimation for Sigma Delta Modulation

TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI

An analysis of nonlinear behavior in delta - sigma modulators

TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI

The Structure of Quantization Noise from Sigma-Delta Modulation

TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI

A fourth-order bandpass sigma-delta modulator

TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.