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Understanding Delta-Sigma Data Converters

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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Nonlinearity-Induced Spurs in Fractional-N Frequency Synthesizers

TL;DR: The state of the art in terms of divider controllers that are themselves spur-free and divider controller that do not produce spurs when used in synthesizers with memoryless polynomial nonlinearities are summarized.
Book ChapterDOI

Enhancing ADC Performance by Exploiting Signal Properties

TL;DR: This chapter starts with a brief introduction of the analog-to-digital conversion process, a discussion of factors that define the performance of ADCs, and a brief discussion of popular Nyquist-rate ADC topologies.
Journal ArticleDOI

Continuous-Time Delta-Sigma Controller for DC-DC Converter

TL;DR: In this article, a continuous-time (CT) feed-forward (FF) ΔΣ controller is proposed to control a DC-DC converter and its transient response is faster than DT and/or feedback-type (FB) controllers.
Proceedings ArticleDOI

Direct ΣΔ Bitstream Processing for High Performance Feedback Control

TL;DR: The design, noise, and performance analysis of a digital controller architecture directly processing $\Sigma\triangle$ bitstreams is described, which substantially reduces control latency by removing the bitstream conversion step.
Proceedings Article

Influence of the Envelope coding on a Class E Amplifier Efficiency in Polar Architecture

TL;DR: In this article, the envelope binary distribution of mobile WiMAX signal is observed when it is coded with a Pulse Width Modulator in EER architecture and with a low pass Sigma-Delta Modulator (SDM) in a polar architecture.
References
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Journal ArticleDOI

A higher order topology for interpolative modulators for oversampling A/D converters

TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI

Decimation for Sigma Delta Modulation

TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI

An analysis of nonlinear behavior in delta - sigma modulators

TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI

The Structure of Quantization Noise from Sigma-Delta Modulation

TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI

A fourth-order bandpass sigma-delta modulator

TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.