Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
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TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
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Journal ArticleDOI
A silicon doped hafnium oxide ferroelectric p–n–p–n SOI tunneling field–effect transistor with steep subthreshold slope and high switching state current ratio
TL;DR: In this paper, a silicon-on-insulator (SOI) p-n-p-n tunneling field effect transistor (TFET) with a silicon doped hafnium oxide (Si:HfO2) ferroelectric gate stack is proposed and investigated via 2D device simulation with a calibrated nonlocal band-to-band tunneling model.
Journal ArticleDOI
An Analytical Drain Current Model of Gate-On-Source/Channel SOI-TFET
Suman Kr. Mitra,Brinda Bhowmick +1 more
TL;DR: In this paper, an analytical drain current model of Gate-on-Source/Channel SOI-TFET is presented. And the model results are compared with the TCAD simulated data to validate the model.
Journal ArticleDOI
Effect of increasing gate capacitance on the performance of a p-MoS2/HfS2 van der Waals heterostructure tunneling field-effect transistor
TL;DR: In this article, the authors proposed a van der Waals-based heterostructure tunneling field effect transistor (TFET) with a type-II band alignment for future power-efficient electronics.
Journal ArticleDOI
Suppressing Non-Uniform Tunneling in InAs/GaSb TFET With Dual-Metal Gate
TL;DR: In this paper, a dual-metal gate structure was proposed to suppress the early onset of edge tunneling in InAs/GaSb hetero-junction tunneling field effect transistors.
Book ChapterDOI
Designing a low-voltage, high-current tunneling transistor
Sapan Agarwal,Eli Yablonovitch +1 more
TL;DR: In this paper, the authors consider a simple tunneling diode and show that it is possible to achieve a sub-threshold swing voltage much steeper than 60 mV/dec and only a few millivolts per decade to reduce operating voltage.
References
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Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.