Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
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TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
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Journal ArticleDOI
Overcoming Biomolecule Location-Dependent Sensitivity Degradation Through Point and Line Tunneling in Dielectric Modulated Biosensors
Praveen Dwivedi,Abhinav Kranti +1 more
TL;DR: In this article, the utility of pocket tunnel field effect transistors (TFETs) for use as dielectric-modulated biosensor is reported, which can be further improved by lowering the pocket doping.
Journal ArticleDOI
Performance Enhancement of Nanowire Tunnel Field-Effect Transistor With Asymmetry-Gate Based on Different Screening Length
TL;DR: In this article, an asymmetric gate tunnel field effect transistor (AG-TFET) with a gate-all-around (GAA) structure in the source and a planar structure in drain is described.
Journal ArticleDOI
Analytical Modeling of a Triple Material Double Gate TFET with Hetero-Dielectric Gate Stack
TL;DR: In this article, an analytical model of a triple material double gate tunnel field effect transistor (TM-DG TFET) with hetero-dielectric gate oxide stack comprising of SiO2 and HfO2 was developed.
Journal ArticleDOI
Insights into the DC, RF/Analog and linearity performance of vertical tunneling based TFET for low-power applications
Neha Paras,Sudakar Singh Chauhan +1 more
TL;DR: In this article, the concept of dual metal and double gate in Vertical TFET is presented to show the improvement of DC as well as analog/RF device performance standards due to enhanced gate modulation.
Journal ArticleDOI
Low-dimensional materials-based field-effect transistors
Feifan Wang,Xiaoyong Hu,Xiaoyong Hu,Xinxiang Niu,Jiajun Xie,S. S. Chu,S. S. Chu,Qihuang Gong,Qihuang Gong +8 more
TL;DR: In this paper, a universal framework is provided to describe the recent progress in this advanced field and it includes discussions of novel materials, new device configurations and the wide variety of device applications.
References
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Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.