Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
More filters
Journal ArticleDOI
Vertical‐Tunneling Field‐Effect Transistor Based on WSe 2 ‐MoS 2 Heterostructure with Ion Gel Dielectric
Journal ArticleDOI
Impact of asymmetric dual-k spacers on tunnel field effect transistors
TL;DR: In this paper, an asymmetric dual-k spacers between the gate and p-gate/source was proposed for tunneling FETs, where the spacer length was optimized for better analog and digital performance.
Patent
Inducing localized strain in vertical nanowire transistors
TL;DR: In this paper, the authors propose a device consisting of a semiconductor substrate and a vertical nano-wire over the semiconductor substrategies, which includes a bottom source/drain region, a channel region over the bottom source and drain regions over the channel region, and a top source/drain region over channel region.
Journal ArticleDOI
Improved source design for p-type tunnel field-effect transistors: Towards truly complementary logic
Devin Verreck,Anne S. Verhulst,Bart Sorée,Bart Sorée,Nadine Collaert,Anda Mocuta,Aaron Thean,Guido Groeseneken +7 more
TL;DR: In this article, the authors proposed a source configuration in which a highly doped region is maintained only near the tunnel junction, where the hot carriers in the exponential tail of the Fermi-Dirac distribution are blocked.
Proceedings ArticleDOI
Experimental demonstration of temperature stability of Si-tunnel FET over Si-MOSFET
TL;DR: In this paper, temperature dependences of tunnel field effect transistor (TFET) and MOSFET were experimentally compared on the same SOI wafer, and it was demonstrated that VTH shift and off-current increment of Si-TFET with temperature were smaller in comparison with Si-MOSFCET.
References
More filters
Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.