Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
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TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
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Journal ArticleDOI
Controlling ambipolar current of dopingless tunnel field-effect transistor
TL;DR: In this paper, a metal strip is embedded inside the oxide region between gate and drain terminals to modulate the energy bands for preventing the tunneling of charge carriers, which reduces the ambipolarity of tunnel field effect transistor (TFET).
Journal ArticleDOI
A crystalline oxide passivation on In0.53Ga0.47As (100)
TL;DR: In this article, the feasibility of a crystalline oxide passivation on In0.53Ga0.47As (100) surfaces was demonstrated experimentally, and it was shown that the control of the Ga oxide states is critical to the formation of the crystalline oxides.
Journal ArticleDOI
Strained silicon based complementary tunnel-FETs: Steep slope switches for energy efficient electronics
Lars Knoll,S. Richter,A. Nichau,Stefan Trellenkamp,A. Schafer,Stephan Wirths,Sebastian Blaeser,Dan Buca,Konstantin Bourdelle,Qing-Tai Zhao,S. Mantl +10 more
TL;DR: In this article, the performance of silicon nanowire tunnel field effect transistors (TFETs) is evaluated and compared with other concepts, focusing on the band-to-band tunneling (BTBT) junctions.
Proceedings ArticleDOI
Influence of dielectric pocket on electrical characteristics of tunnel field effect transistor: A study to optimize the device efficiency
TL;DR: In this article, the impact of pocket scaling and different dielectric combinations on the device performance has been investigated using ATLAS device simulator, and the device promises an improved performance in terms of increased on-state current I on, increased transconductance g m, increased I on -I off ratio, reduced subthreshold swing, gate capacitance and threshold voltage value.
Journal ArticleDOI
Study on Random Dopant Fluctuation in Core–Shell Tunneling Field-Effect Transistors
Jun-Sik Yoon,Rock-Hyun Baek +1 more
TL;DR: In this paper, the Sano model was adopted to consider short and long-range Coulomb potentials separately under drift-diffusion transport, and the performance variations induced by the RDF effects were investigated using 3-D numerical simulations.
References
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Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.