Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
Reads0
Chats0
TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
More filters
Journal ArticleDOI
InAs–Si Nanowire Heterojunction Tunnel FETs
TL;DR: In this paper, a vertical InAs-Si nanowire heterojunction tunnel FET is presented, which achieves high Ion/Ioff ratios above 106, with an Ion of 2.4 μA/μm and an inverse sub-threshold slope of 150 mV/dec measured over three decades of current.
Journal ArticleDOI
Growth and optical properties of axial hybrid III–V/silicon nanowires
Moïra Hocevar,George Immink,Marcel A. Verheijen,Marcel A. Verheijen,Nika Akopian,Val Zwiller,Leo P. Kouwenhoven,Erik P. A. M. Bakkers,Erik P. A. M. Bakkers +8 more
TL;DR: A silicon nanowire with an integrated gallium-arsenide segment is demonstrated and it is anticipated that such hybrid silicon/III-V nanowires open practical routes for quantum information devices, where for instance electronic and photonic quantum bits are manipulated in a III-V segment and stored in a silicon section.
Journal ArticleDOI
Optimization of Gate-on-Source-Only Tunnel FETs With Counter-Doped Pockets
Kuo-Hsing Kao,Anne S. Verhulst,William G. Vandenberghe,Bart Sorée,Wim Magnus,Daniele Leonelli,Guido Groeseneken,K. De Meyer +7 more
TL;DR: In this paper, a gate-on-source tunnel FET with a counter-doped parallel pocket under the gate-source overlap was investigated and shown to have a steeper sub-threshold slope and higher ON-current than a gate on the channel.
Journal ArticleDOI
From two-dimensional materials to heterostructures
Tianchao Niu,Ang Li +1 more
TL;DR: Graphene, hexagonal boron nitride, molybdenum disulphide, and layered transition metal dichalcogenides (TMDCs) represent a class of two-dimensional (2D) atomic crystals with unique properties due to reduced dimensionality.
Journal ArticleDOI
Study of Random Dopant Fluctuation Induced Variability in the Raised-Ge-Source TFET
TL;DR: In this article, the impact of random dopant fluctuations (RDF) on the performance of an optimized TFET design comprising a raised germanium (Ge) source region was investigated via 3-D TCAD simulation.
References
More filters
Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.