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Journal ArticleDOI

Tunnel field-effect transistors as energy-efficient electronic switches

Adrian M. Ionescu, +1 more
- 17 Nov 2011 - 
- Vol. 479, Iss: 7373, pp 329-337
TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
Abstract
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.

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Citations
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Journal ArticleDOI

Complementary Black Phosphorus Tunneling Field-Effect Transistors.

TL;DR: Two complementary TFETs based on few-layer black phosphorus are demonstrated, in which multiple top gates create electrostatic doping in the source and drain regions, and atomistic simulations of the fabricated devices agree quantitatively with the current-voltage measurements.
Proceedings ArticleDOI

Vertical InAs/GaAsSb/GaSb tunneling field-effect transistor on Si with S = 48 mV/decade and I on = 10 μA/μm for I off = 1 nA/μm at V ds = 0.3 V

TL;DR: In this paper, a vertical nanowire InAs/GaAsSb/GaSb TFET with a highly scaled InAs diameter (20 nm) is presented, which exhibits a minimum sub-threshold swing of 48 mV/dec. for V ds = 0.1 and 0.3 V.
Journal ArticleDOI

Highly Stable Near-Unity Photoluminescence Yield in Monolayer MoS2 by Fluoropolymer Encapsulation and Superacid Treatment

TL;DR: An encapsulation/passivation approach is demonstrated that yields near-unity PL QY in MoS2 and WS2 monolayers which are highly stable against postprocessing and can be patterned by lithography and compatible with subsequent fabrication processes.
Journal ArticleDOI

GeSn/SiGeSn Heterostructure and Multi Quantum Well Lasers

TL;DR: In this article, the authors investigate GeSn/SiGeSn multi quantum wells using the optically pumped laser effect and show that the design with multi quantum well reduces the lasing threshold to 40 ± 5 kW/cm2 at 20 K, almost 10 times lower than for bulk structures.
Journal ArticleDOI

Robust ultrasensitive tunneling-FET biosensor for point-of-care diagnostics.

TL;DR: A novel biosensor based on a complementary metal oxide semiconductor (CMOS)-compatible silicon nanowire tunneling field-effect transistor (SiNW-TFET) that provided strong anti-interference capacity and the ability to use clinically relevant samples such as serum is presented.
References
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Proceedings Article

Physics of semiconductor devices

S. M. Sze
Journal ArticleDOI

Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices

TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI

Low-Voltage Tunnel Transistors for Beyond CMOS Logic

TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI

Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric

TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI

A theory of the electrical breakdown of solid dielectrics

TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.
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