Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
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TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
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Journal ArticleDOI
Effects of ZrO 2 /Al 2 O 3 Gate-Stack on the Performance of Planar-Type InGaAs TFET
TL;DR: It is shown that 1-nm-thick capacitance equivalent thickness (CET) with low leakage current is achieved by using ZrO/Al/O/sub/3 interfacial layers (ILs) with the dielectric constant of around 40 on In.
Journal ArticleDOI
Material and device engineering in fully depleted silicon-on-insulator transistors to realize a steep subthreshold swing using negative capacitance
TL;DR: In this article, a negative dielectric constant (NDC) was proposed for field effect transistors (FETs) with HfO2-based gate insulators to attain a precipitous sub-threshold swing (SS) by exploiting negative capacitance.
Journal ArticleDOI
Piezoelectric Strain Modulation in FETs
TL;DR: In this article, a piezoelectric layer is added to the transistor to modulate the strain in the channel, which is proportional to the gate-source voltage, and thus increases as the device is turned on.
Journal ArticleDOI
Improvement in analog/RF performances of SOI TFET using dielectric pocket
TL;DR: In this paper, the impact of dielectric pocket on analog/radio-frequency (RF) performances of SOI-TFET was investigated, and it was found that the inclusion of a Dielectric Pocket to SOI -TFET has been found to have...
Journal ArticleDOI
Electromagnetically and optomechanically induced transparency and amplification in an atom-assisted cavity optomechanical system
He Hao,Mark C. Kuzyk,Juanjuan Ren,Fan Zhang,Xueke Duan,Ling Zhou,Tiancai Zhang,Qihuang Gong,Hailin Wang,Ying Gu +9 more
TL;DR: In this article, an atom-assisted cavity optomechanical system consisting of a single $\mathrm{\ensuremath{\Lambda}}$-type three-level atom, a mechanical resonator, and a sideband-driven cavity is presented.
References
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Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.