Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
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TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
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Journal ArticleDOI
A Thermodynamic Perspective of Negative-Capacitance Field-Effect Transistors
TL;DR: In this article, a unified simulation framework for negative capacitance field effect transistors (NCFETs) is presented, which incorporates the Landau mean-field treatment of free energy of a ferroelectric (FE) and the polarization dynamics according to Landau-Khalatnikov (LK) equation.
Journal ArticleDOI
Computational Study of p-n Carbon Nanotube Tunnel Field-Effect Transistor
TL;DR: In this paper, a gate-all-around (GAA) p-n carbon nanotube TFET (CNT-TFET) is proposed and compared with its conventional counterpart.
Journal ArticleDOI
Gate-all-around junctionless silicon transistors with atomically thin nanosheet channel (0.65 nm) and record sub-threshold slope (43 mV/dec)
Vasanthan Thirunavukkarasu,Yi-Ruei Jhan,Yan-Bo Liu,Erry Dwi Kurniawan,Yu-Ru Lin,Shang-Yi Yang,Che-Hsiang Cheng,Yung-Chun Wu +7 more
TL;DR: A silicon junctionless gate-all-around (GAA) nanowire field-effect transistor with an atomically thin channel thickness of 0.65 nm and a very thin oxide with a thickness of 12.3 nm was demonstrated experimentally in this paper.
Journal ArticleDOI
High frequency performance of dual metal gate vertical tunnel field effect transistor based on work function engineering
TL;DR: In this article, a dual metal gate doping-less vertical tunnel field effect transistor (D-VTFET) was proposed, which is immune greatly to the process variation, issues of doping control and random dopant fluctuations.
Journal ArticleDOI
Robust Impact-Ionization Field-Effect Transistor Based on Nanoscale Vertical Graphene/Black Phosphorus/Indium Selenide Heterostructures.
Anyuan Gao,Zhiyi Zhang,Lingfei Li,Binjie Zheng,Chenyu Wang,Yaojia Wang,Tianjun Cao,Yu Wang,Shi-Jun Liang,Feng Miao,Yi Shi,Xiaomu Wang +11 more
TL;DR: By facilitating the carrier multiplication of the ballistic impact-ionization process as the internal gain mechanism in sub-mean-free-path (sub-MFP) channels, the IITs exhibit a low average sub-threshold swing (SS <1 mV/dec) over five current levels.
References
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Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.