Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
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Journal ArticleDOI
Analytic drain current model for III–V cylindrical nanowire transistors
Enrique G. Marin,Enrique G. Marin,Francisco G. Ruiz,Volker Schmidt,Andres Godoy,Heike Riel,Francisco Gamiz +6 more
TL;DR: In this article, an analytical model is proposed to determine the drain current of III-V cylindrical nanowires (NWs), using the gradual channel approximation and taking into account the complete analytical solution of the Poisson and Schrodinger equations for the Γ-valley and for an arbitrary number of subbands.
Journal ArticleDOI
A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator
TL;DR: A novel Core–Insulator Gate-All-Around (CIGAA) nanowire has been proposed, investigated, and simulated comprehensively and systematically based on 3D numerical simulation, making it a suitable candidate of future low-power and energy-efficient devices.
Journal ArticleDOI
Implementing Logic Functions Using Independently-Controlled Gate in Double-Gate Tunnel FETs: Investigation and Analysis
Shelly Garg,Sneh Saurabh +1 more
TL;DR: The root cause of problems in a compact realization of logic gates using double-gate tunnel field effect transistors (DGTFETs) with independently-controlled gate is examined and solutions to tackle them are explored.
Journal ArticleDOI
Boosting the optical performance and commutation speed of phototransistor using SiGe/Si/Ge tunneling structure
Hichem Ferhati,Fayçal Djeffal +1 more
TL;DR: In this article, a new optically controlled tunneling field effect transistor (OC-TFET) based on SiGe/Si/Ge hetero-channel is proposed to improve optical commutation speed and reduce power consumption.
Journal ArticleDOI
InSb Nanowires with Built-In GaxIn1–xSb Tunnel Barriers for Majorana Devices
Diana Car,Sonia Conesa-Boj,Hao Zhang,Roy L. M. Op het Veld,Michiel W. A. de Moor,Elham M. T. Fadaly,Önder Gül,Sebastian Kölling,Sebastien Plissard,Vigdis Toresen,Michael Wimmer,Kenji Watanabe,Takashi Taniguchi,Leo P. Kouwenhoven,Erik P. A. M. Bakkers,Erik P. A. M. Bakkers +15 more
TL;DR: This work proposes a material-oriented approach to engineer a sharp and narrow tunnel barrier by synthesizing a thin axial segment of GaxIn1-xSb within an InSb nanowire from the Wentzel-Kramers-Brillouin fits to the experimental I-V traces.
References
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Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.