Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
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TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
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Journal ArticleDOI
Progress and future prospects of negative capacitance electronics: A materials perspective
TL;DR: In this paper, the authors present a unique view of the field of negative capacitance electronics from the ferroelectric materials perspective, concluding that HfO2-based ferroelectrics are currently most promising for applications in electronics.
Journal ArticleDOI
Numerical Simulation of N + Source Pocket PIN-GAA-Tunnel FET: Impact of Interface Trap Charges and Temperature
Jaya Madan,Rishu Chaujar +1 more
TL;DR: In this paper, the reliability of PIN-gate-all-around (GAA)-tunnel field effect transistor (TFET) with N+ source pocket was examined by analyzing: 1) the impact of interface trap charge (ITC) density and polarity and 2) the temperature affectability on analog/RF performance.
Journal ArticleDOI
A Semi-Floating Gate Transistor for Low-Voltage Ultrafast Memory and Sensing Operation
Peng-Fei Wang,Xi Lin,Lei Liu,Qing-Qing Sun,Peng Zhou,Xiao-Yong Liu,Wei Liu,Yi Gong,David Wei Zhang +8 more
TL;DR: A transistor is reported that uses an embedded tunneling field-effect transistor for charging and discharging the semi-floating gate and can achieve ultra–high-speed writing operations (on time scales of ~1 nanosecond).
Journal ArticleDOI
Growth and properties of InGaAs nanowires on silicon
TL;DR: In this paper, the growth, structural, optical and electrical properties of ternary InGaAs nanowires (NW) on Si substrate are highlighted. But the focus is on a comparison between conventional catalyst-assisted and catalyst-free growth methods as well as self-assembled versus site-selectively grown NW arrays, and it is shown that high-periodicity NW arrays with extremely high compositional uniformity are mandatory to allow unambiguous structure-property correlation measurements.
Journal ArticleDOI
Few-layer Phosphorene: An Ideal 2D Material For Tunnel Transistors
TL;DR: In this article, the authors proposed a few-layer phosphorene transition metal dichalcogenides (TMD) for energy-efficient and scalable replacement of MOSFETs.
References
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Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.