Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
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TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
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Journal ArticleDOI
Improved performance of a junctionless tunnel field effect transistor with a Si and SiGe heterostructure for ultra low power applications
TL;DR: In this article, the authors presented improved device characteristics of a junctionless tunnel field effect transistor (JLTFET) with a Si and SiGe heterostructure for low power applications.
Journal ArticleDOI
Unipolar behavior of asymmetrically doped strained Si0.5Ge0.5 tunneling field-effect transistors
M. Schmidt,R. A. Minamisawa,S. Richter,A. Schafer,Dan Buca,J.M. Hartmann,Qing-Tai Zhao,S. Mantl +7 more
TL;DR: In this article, the impact of the dopant concentration in the source and drain regions on the ambipolar behavior of band-to-band tunneling field effect transistors with compressively strained Si0.5Ge0.
Journal ArticleDOI
Optimal design for a high performance H-JLTFET using HfO2 as a gate dielectric for ultra low power applications
TL;DR: In this article, the authors proposed an optimal design for a hetero-junctionless tunnel field effect transistor (TFET) using HfO2 as a gate dielectric.
Journal ArticleDOI
Tunnel field-effect transistors for sensitive terahertz detection
Igor Gayduchenko,Shuigang Xu,Georgy Alymov,M. Moskotin,M. Moskotin,I. V. Tretyakov,Takashi Taniguchi,Kenji Watanabe,Gregory Goltsman,Gregory Goltsman,Andre K. Geim,Georgy Fedorov,Georgy Fedorov,Dmitry Svintsov,Denis A. Bandurin,Denis A. Bandurin,Denis A. Bandurin +16 more
TL;DR: It is demonstrated how switching from intraband Ohmic to interband tunneling regime can raise detectors’ responsivity by few orders of magnitude, in agreement with the developed theory.
Journal ArticleDOI
Suppressed Fin-LER Induced Variability in Negative Capacitance FinFETs
Ho-Pei Lee,Pin Su +1 more
TL;DR: In this article, the impact of fin line edge roughness (Fin-LER) on the intrinsic variation of negative capacitance FinFETs was investigated by TCAD atomistic simulation coupled with the Landau-Khalatnikov equation.
References
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Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.