Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
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Journal ArticleDOI
Fully Analytical Carrier-Based Charge and Capacitance Model for Hetero-Gate-Dielectric Tunneling Field-Effect Transistors
TL;DR: Based on an analytical surface potential model incorporating the channel inversion carriers, a physics-based terminal capacitance model with closed-form solutions for a hetero-gate-dielectric (HGD) tunnel field-effect transistor (TFET) is developed for the first time in this article.
Journal ArticleDOI
Analytical modeling and simulation analysis of T-shaped III-V heterojunction vertical T-FET
Shailendra Singh,Balwinder Raj +1 more
TL;DR: In this paper, a 2D Poisson equation is solved for the proposed model by using parabolic approximation method with constant electric field which are used to determine the effect of In0.53Ga0.47As as a comparison to Silicon and SiGe material device.
Journal ArticleDOI
CVD grown bilayer WSe2/MoSe2 heterostructures for high performance tunnel transistors
Toshifumi Irisawa,Naoya Okada,Wen-Hsin Chang,Mitsuhiro Okada,Takahiro Mori,Takahiko Endo,Yasumitsu Miyata +6 more
TL;DR: In this article, a bilayer WSe2/MoSe2 van der Waals heterostructures have been directly grown on SiO2/Si substrates by 2-step chemical vapor deposition method.
Journal ArticleDOI
Mapping Defect Density in MBE Grown ${\rm In}_{0.53}{\rm Ga}_{0.47}{\rm As}$ Epitaxial Layers on Si Substrate Using Esaki Diode Valley Characteristics
Kausik Majumdar,Paul Thomas,Wei-Yip Loh,P. Y. Hung,Ken Matthews,David Pawlik,Brian Romanczyk,Matthew J. Filmer,Abhinav Gaur,Ravi Droopad,Sean L. Rommel,Chris Hobbs,Paul D. Kirsch +12 more
TL;DR: In this paper, the authors show that the valley current density is strongly correlated with the underlying epi defect density and propose a model to explain the experimental observations and validate using multiple temperature diode $I{-V$ data.
Journal ArticleDOI
Dual metal gate tunneling field effect transistors based on MOSFETs: A 2-D analytical approach
Zeinab Ramezani,Ali A. Orouji +1 more
TL;DR: In this paper, a 2D analytical drain current model of novel dual metal gate tunnel field effect transistors based on MOSFETs (DMG-TFETs) is presented.
References
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Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.