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Journal ArticleDOI

Tunnel field-effect transistors as energy-efficient electronic switches

Adrian M. Ionescu, +1 more
- 17 Nov 2011 - 
- Vol. 479, Iss: 7373, pp 329-337
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TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
Abstract
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.

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Citations
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Journal ArticleDOI

Catalyst Composition and Impurity-Dependent Kinetics of Nanowire Heteroepitaxy

TL;DR: In this paper, the mechanisms and kinetics of axial Ge-Si nanowire heteroepitaxial growth based on the tailoring of the Au catalyst composition via Ga alloying are studied by environmental transmission electron microscopy combined with systematic ex situ CVD calibrations.
Journal ArticleDOI

Design and properties of planar-type tunnel FETs using In0.53Ga0.47As/InxGa1-xAs/In0.53Ga0.47As quantum well

TL;DR: In this paper, a tunnel FET with In0.53Ga0.47As/InxGa1-xAs QW channels was proposed, which can significantly enhance the performance.
Journal ArticleDOI

Controlling the ambipolar current in ultrathin SOI tunnel FETs using the back-bias effect

TL;DR: In this article, a 2D simulation study of the back bias in the ultrathin silicon-on-insulator (SOI) tunnel field effect transistor (TFET) is presented.
Journal ArticleDOI

In-Line Tunnel Field Effect Transistor: Drive Current Improvement

TL;DR: In this article, a new architecture of tunnel field effect transistor (TFET) with in-line (vertical) tunneling area is introduced, which outperformed the normal TFET in terms of the drive current, the sub-threshold swing, and the intrinsic time delay.
Journal ArticleDOI

Harnessing the Metal-Insulator Transition of VO2 in Neuromorphic Computing.

TL;DR: In this article , the authors discuss strategies for tuning the transformation characteristics of VO2 based on modification of material properties, interfacial structure, and field couplings, and highlight opportunities for inverse design and for using design principles related to thermodynamics and kinetics of electronic transitions learned from VO2.
References
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Proceedings Article

Physics of semiconductor devices

S. M. Sze
Journal ArticleDOI

Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices

TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI

Low-Voltage Tunnel Transistors for Beyond CMOS Logic

TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI

Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric

TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI

A theory of the electrical breakdown of solid dielectrics

TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.
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