Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
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TLDR
Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.Abstract:
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.read more
Citations
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Journal ArticleDOI
Tunnel field-effect transistors with germanium/strained-silicon hetero-junctions for low power applications
Minsoo Kim,Younghyun Kim,Masafumi Yokoyama,Ryosho Nakane,Sanghyeon Kim,Mitsuru Takenaka,Shinichi Takagi +6 more
TL;DR: In this paper, a simple n-channel tunnel field effect transistor with a pure-Ge/strained-Si hetero-junction was demonstrated for the devices fabricated by combining epitaxially-grown Ge on strained-silicon-on-insulator substrates.
Journal ArticleDOI
Low-Temperature Polycrystalline-Silicon Tunneling Thin-Film Transistors With MILC
TL;DR: In this article, a tunneling TFT (T-TFT) fabricated by metal-induced lateral crystallization (MILC) thin-film transistors (TFTs) is presented.
Journal ArticleDOI
Ab Initio Simulation of Band-to-Band Tunneling FETs With Single- and Few-Layer 2-D Materials as Channels
TL;DR: In this paper, the potential of band-to-band tunneling FETs with a 2D channel material as future electronic circuit components was evaluated using full-band atomistic quantum transport simulations.
Journal ArticleDOI
A simple route to synchronized nucleation of self-catalyzed GaAs nanowires on silicon for sub-Poissonian length distributions
Tina Tauchnitz,Tina Tauchnitz,Yury Berdnikov,Vladimir G. Dubrovskii,Harald Schneider,Manfred Helm,Manfred Helm,Emmanouil Dimakis +7 more
TL;DR: A simple route to grow ensembles of self-catalyzed GaAs nanowires with a remarkably narrow statistical distribution of lengths on natively oxidized Si(111) substrates and the reproducibility of sub-Poissonian LDs attests the reliability of the growth method.
Journal ArticleDOI
Design and Simulation of a Novel Graded-Channel Heterojunction Tunnel FET With High ${I} _{\scriptscriptstyle\text {ON}}/{I} _{\scriptscriptstyle\text {OFF}}$ Ratio and Steep Swing
TL;DR: In this letter, a novel graded-channel heterojunction tunnel field-effect transistor (GCH-TFET) is proposed and studied by simulation, exhibiting excellent potential for ultra-low power applications.
References
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Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
A theory of the electrical breakdown of solid dielectrics
TL;DR: In this paper, two distinct mechanisms have been suggested for the sudden increase of the number of electrons in an unfilled band, which occurs when the field strength passes a critical value, analogous to the electrical breakdown of gases.