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Chenming Hu
Researcher at University of California, Berkeley
Publications - 1300
Citations - 60963
Chenming Hu is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Gate oxide. The author has an hindex of 119, co-authored 1296 publications receiving 57264 citations. Previous affiliations of Chenming Hu include Motorola & National Chiao Tung University.
Papers
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Proceedings ArticleDOI
Simulations of CMOS circuit degradation due to hot-carrier effects
TL;DR: In this article, the authors compared long-term ring-oscillator hot-carrier degradation data and simulation results and showed that a public-domain circuit simulator, BERT (Berkeley Reliability Tools), can predict CMOS digital circuit speed degradation from transistor DC stress data.
Journal ArticleDOI
Determination of carrier lifetime from rectifier ramp recovery waveform
B. Tien,Chenming Hu +1 more
TL;DR: In this paper, a charge control analysis is used to obtain an expression relating the carrier lifetime to the realistic ramp recovery waveform of a p-i-n diode of arbitrary softness.
Proceedings ArticleDOI
Unified FinFET compact model: Modelling Trapezoidal Triple-Gate FinFETs
TL;DR: In this article, a unified FinFET compact model is proposed for devices with complex fin cross-sections, which is represented in a normalized form, where only four different model parameters are needed.
Journal ArticleDOI
Patterning sub-30-nm MOSFET gate with i-line lithography
TL;DR: In this article, resist ashing and oxide hard mask trimming were used to fabricate experimental devices with line width beyond the limit of optical lithography or high-throughput e-beam lithography.
Proceedings ArticleDOI
TMD FinFET with 4 nm thin body and back gate control for future low power technology
Min-Cheng Chen,Kai-Shin Li,Lain-Jong Li,Ang-Yu Lu,Ming-Yang Li,Yung Huang Chang,Chang-Hsien Lin,Yi-Ju Chen,Yun-Fang Hou,Chun-Chi Chen,Bo-Wei Wu,Cheng-San Wu,Ivy Yang,Yao-Jen Lee,Jia-Min Shieh,Wen-Kuan Yeh,Jyun-Hong Shih,Po-Cheng Su,Angada B. Sachid,Tahui Wang,Fu-Liang Yang,Chenming Hu +21 more
TL;DR: In this paper, a 4 nm thin transition-metal dichalcogenide (TMD) body FinFET with back gate control is proposed and demonstrated for the first time, where the TMD FinFet channel is deposited by CVD.