Open AccessBook
Digital Systems Testing and Testable Design
TLDR
The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.Abstract:
For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.read more
Citations
More filters
Journal ArticleDOI
E-BIST: enhanced test-per-clock BIST architecture
Y. Son,Jong-Wha Chong,G. Russell +2 more
TL;DR: The results of experiments on ISCAS 89 benchmark circuits show that this architecture is also suitable for robustly detecting path delay faults, with improved fault coverage, when the Hamming distance of the data in the SRL channel is considered.
Journal ArticleDOI
Delay Fault Coverage Enhancement Using Variable Observation Times
TL;DR: An efficient method is proposed to reduce the amount of fault Coverage loss by using variable observation times, and given a probability distribution of defect sizes and aset of slack differences, this method is able to locate several observation times that result in small fault coverage loss.
Proceedings ArticleDOI
MOSAIC: a multiple-strategy oriented sequential ATPG for integrated circuits
TL;DR: A novel approach in an attempt to solve the test problem for sequential circuits, which takes into account the existing techniques and algorithms and at each step selects the strategy that is best adapted to catch the targeted faults.
Proceedings Article
SAT-based verification methods and applications in hardware
TL;DR: Verification methods based on Boolean Satisfiability (SAT) have emerged as a promising alternative to BDD-based symbolic model checking methods and have been used for verifying large hardware designs as mentioned in this paper.
Proceedings ArticleDOI
Efficient signature-based fault diagnosis using variable size windows
TL;DR: The results show that the proposed method can improve the diagnostic resolution and can reduce the cost of diagnosis.