Open AccessBook
Digital Systems Testing and Testable Design
TLDR
The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.Abstract:
For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.read more
Citations
More filters
Journal ArticleDOI
Generating reliable embedded processors
M. Pflanz,H.T. Vierhaus +1 more
TL;DR: This approach to designing fault-tolerant embedded systems-using PLDs to duplicate application-specific hardware-significantly reduces the costs of classical fault-Tolerance techniques.
Proceedings ArticleDOI
Yield analysis of logic circuits
TL;DR: This work emphasizes the results obtained in systematically applying ATPG diagnosis on failures detected in the manufacturing test floor.
Proceedings ArticleDOI
ERTG: A test generator for error-rate testing
TL;DR: The test generator embodies new algorithms and cost functions that capture the properties of acceptable and unacceptable faults and can provide coverage of all unacceptable faults while significantly reducing the number of acceptable faults detected.
Proceedings ArticleDOI
A Theory of Error-Rate Testing
TL;DR: A theory of error-rate testing is developed and empirical data is obtained that show that even in arbitrary circuits, it is possible to detect every unacceptable fault while detecting only a fraction of acceptable faults.
Proceedings ArticleDOI
On-chip analog output response compaction
TL;DR: The integration function is identified as a powerful analog compression scheme and an analog signature analyzer is proposed, which permits the monitoring of some extra internal nodes in addition to the classical output nodes, or the concurrent control of both voltage and current levels.