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Digital Systems Testing and Testable Design

TLDR
The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.
Abstract
For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.

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Concurrent testing in high-level synthesis

TL;DR: An algorithm for synthesizing the test circuit is presented that starts with the data-flow graph, generating a circuit to cycle test vectors through the idle hardware and produce a signature so as to give a built-in-self-test.
Journal ArticleDOI

Fault Table Computation on GPUs

TL;DR: This paper’s implementation is a significantly modified version of FSIM, which is pattern parallel fault simulation approach for single core processors, and employs a pattern parallel approach which utilizes both bit-parallelism and thread-level parallelism.
Proceedings ArticleDOI

New reseeding technique for LFSR-based test pattern generation

TL;DR: A new reseeding technique for LFSR-based test pattern generation suitable for circuits with random-pattern resistant faults is presented, which eliminates the need of a ROM for storing the seeds and an efficient algorithm for selecting reseeding points is presented.
Proceedings ArticleDOI

Application-aware diagnosis of runtime hardware faults

TL;DR: This work proposes a hybrid hardware/software online testing solution where components that are heavily utilized by the software application are tested more thoroughly and frequently, and it achieves high coverage while incurring minimal performance overhead.