Open AccessBook
Digital Systems Testing and Testable Design
TLDR
The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.Abstract:
For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.read more
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Proceedings ArticleDOI
Tutorial on design for testability (DFT) "An ASIC design philosophy for testability from chips to systems"
TL;DR: This tutorial covers discussion and features of Institute of Electrical and Electronics Engineers (IEEE) Standard 1149.1, Joint Test Action Group (JTAG) test technique, that can be implemented during design and development of digital ASIC and systems.
Journal ArticleDOI
Producing reliable initialization and test of sequential circuits with pseudorandom vectors
TL;DR: An extended Markov chain model that covers the initialization phase is proposed that supports the theoretical framework used to demonstrate that sequential circuits can be initialized with pseudorandom vectors and leads to a uniform BIST approach.
Design for test & debug in hardware/software systems
TL;DR: System Architecture Architecture Refinement Hardware Synthesis Detailed System Architecture Synthesis Communication Synthesis Software Synthesis Hardware & Software Components Hardware/Software Integration System Implementation Figure 2.2 Hardware/ software co-design flow 13 A concise description of the subsequent steps in the hardware/software co- design flow is presented next.
Journal ArticleDOI
Testbench Qualification of SystemC TLM Protocols through Mutation Analysis
TL;DR: This article presents a methodology to apply mutation analysis, a technique applied in literature for SW testing, for measuring the testbench quality in verifying TLM protocols, and experimental results on benchmarks of different complexity and architectural characteristics are reported to analyze the methodology applicability.