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Digital Systems Testing and Testable Design
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TLDR
The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.Abstract:
For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.read more
Citations
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Journal ArticleDOI
Automatic analog test signal generation using multifrequency analysis
TL;DR: A new multifrequency test generation technique for detecting catastrophic and parametric failures in this class of circuits is presented and may be used to construct input signals for the selection of an external stimulus applied through an arbitrary waveform generator.
Patent
Fault dictionaries for integrated circuit yield and quality analysis methods and systems
TL;DR: In this article, one or more fault dictionaries are generated for identifying one or multiple defect candidates from corresponding observation point combinations, which indicate the observation points of a circuit-under-test that captured faulty test values upon application of a respective test pattern.
Patent
Restartable logic bist controller
Chris Hill,T. Rinderknecht +1 more
TL;DR: A method and apparatus for testing an integrated circuit using built-in self-test (BIST) techniques is described in this paper, where a scan monitor with hold logic and a signature generation element is used to suspend signature generation at any desired point in the test sequence.
Proceedings ArticleDOI
On the Evaluation of Transactor-based Verification for Reusing TLM Assertions and Testbenches at RTL
TL;DR: The quality of the TBV towards the rewriting of assertions and test benches at RTL with respect to both fault coverage and assertion coverage is theoretically compared.
Journal ArticleDOI
Bit-serial and digit-serial GF(2 m )Montgomery multipliers using linear feedback shift registers
TL;DR: The results show that the use of LFSRs simplifies the design of the multipliers architecture reducing area resources and retaining high performance compared to related works.