Open AccessBook
Digital Systems Testing and Testable Design
TLDR
The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.Abstract:
For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.read more
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Patent
Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (dfd) techniques
Laung-Terng Wang,Ming-Tung Chang,Shyh-Horng Lin,Hao-Jan Chao,Jachee Lee,Hsin-Po Wang,Xiaoqing Wen,Po-Ching Hsu,Shih-Chia Kao,Meng-Chyi Lin,Sen-Wei Tsai,Chi-Chan Hsu +11 more
TL;DR: In this article, a method and apparatus for inserting design-for-debug (DFD) circuitries in an integrated circuit to debug or diagnose DFT modules, including scan cores, memory BIST (built-in self-test) cores, logic BIST cores, and functional cores, is presented.
Journal ArticleDOI
Reconfigurable architecture for autonomous self-repair
TL;DR: This work introduces an effective, low-cost repair solution in which originally unused blocks and routing resources replace faulty parts, and the proposed reconfiguration hardware allows autonomous repair, that is, the system does not require external intervention for recovery.
Proceedings ArticleDOI
Multi-level logic optimization by implication analysis
Wolfgang Kunz,Prem R. Menon +1 more
TL;DR: It is shown that Recursive Learning can derive “good” Boolean divisors justifying the effort to attempt a Boolean division, and for 9 out of 10 ISCAS-85 benchmark circuits, the tool HANNIBAL obtains smaller circuits than the well-known synthesis system SIS.
Proceedings ArticleDOI
Robust search algorithms for test pattern generation
J.O.M. Silva,Karem A. Sakallah +1 more
TL;DR: This paper describes an algorithm for ATPG that is robust and still very efficient and reduces heuristic knowledge to a minimum and relies on an optimized search algorithm for effectively pruning the search space.
Proceedings ArticleDOI
VirtualScan: a new compressed scan technology for test cost reduction
Laung-Terng Wang,Xiaoqing Wen,Hiroshi Furukawa,Fei-Sheng Hsu,Shyh-Horng Lin,Sen-Wei Tsai,Khader S. Abdel-Hafez,Shianling Wu +7 more
TL;DR: The VirtualScan technology has achieved successful tape-outs of industrial chips and has been proven to be an efficient and easy-to-implement solution for scan test cost reduction.