Open AccessBook
Digital Systems Testing and Testable Design
TLDR
The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.Abstract:
For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.read more
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Journal ArticleDOI
Application of homing sequences to synchronous sequential circuit testing
Irith Pomeranz,Sudhakar M. Reddy +1 more
TL;DR: A test generation procedure for synchronous sequential circuits is proposed, that is based on the multiple observation times approach, and uses homing sequences, instead of conventionally used synchronizing sequences, to initialize the circuit.
Proceedings ArticleDOI
Efficient variable ordering heuristics for shared ROBDD
P.-Y. Chung,I.M. Hajj,J.H. Patel +2 more
TL;DR: Several ordering heuristics for shared, reduced and ordered binary decision diagrams (ROBDDs) are described to provide a fast way to generate shared ROBDDs of reasonable sizes and could be used as a good initial solution to any semi-exhaustive ordering method to further reduce the sizes.
Proceedings ArticleDOI
Low cost analogue testing of RF signal paths
TL;DR: A low cost method for testing analogue RF signal paths suitable for BIST implementation in a SoC environment based on the use of a simple and low-cost one-bit digitizer that enables the reuse of processor and memory resources available in the SoC, while incurring little analogue area overhead.
Journal ArticleDOI
Synchronization overhead in SOC compressed test
TL;DR: A novel scalable and programmable on-chip distribution architecture is proposed, which addresses the synchronization overhead problem and facilitates the use of low cost testers for manufacturing test.
Proceedings ArticleDOI
Diagnosis of Byzantine open-segment faults [scan testing]
TL;DR: The goal is to further narrow down the faults to a few suspected segments, with such a technique, the silicon inspection time could be dramatically slashed when the fault occurs to a long-running wire with a large number of fanouts.