Open AccessBook
Digital Systems Testing and Testable Design
TLDR
The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.Abstract:
For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.read more
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Proceedings ArticleDOI
Test generation and fault simulation methods on the basis of cubic algebra for digital devices
Vladimir Hahanov,A.V. Babich +1 more
TL;DR: The described cubic fault simulation method allows to propagate primitive fault lists from its inputs to outputs; to generate analytical equations for deductive fault simulation of digital circuit at gate, functional and algorithmic description levels; to build comparative and interpretative fault simulators for digital circuit.
Proceedings ArticleDOI
Test generation for maximizing ground bounce for internal circuitry with reconvergent fan-outs
TL;DR: A branch and bound procedure is developed that can find a good quality test for maximum ground bounce in a rather short time and comparison of results with SPICE simulations confirms the quality of tests obtained.
Proceedings ArticleDOI
Estimation of Maximum Power-up Current
Fei Li,Lei He,Kewal K. Saluja +2 more
TL;DR: This paper proposes a cluster-based ATPG algorithm to estimate the maximum power-up current for combinational circuits, and forms the sequential circuit maximum current problem as a combinational ATPG problem, and solves it using the cluster- based estimation algorithm.
Book ChapterDOI
Fundamentals of Dependability
TL;DR: This chapter studies three fundamental characteristics of dependability: attributes, impairment, and means.
Journal ArticleDOI
Behavioral Fault Modeling and Simulation Using VHDL-AMS to Speed-Up Analog Fault Simulation
Y. Kilic,Mark Zwolinski +1 more
TL;DR: Behavioral fault modeling is discussed, whereby parts of the circuit are modeled at a more abstract level, therefore reducing the complexity and the simulation time of analog circuits.