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Institution

STMicroelectronics

CompanyGeneva, Switzerland
About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Signal & Transistor. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.


Papers
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Journal ArticleDOI
24 Apr 2015
TL;DR: GreenNet is an energy efficient and fully operational protocol stack for IP-enabled wireless sensor networks based on the IEEE 802.15.4 beacon-enabled medium access control integrated with lightweight IP routing for achieving very low duty cycles.
Abstract: This paper presents G reen N et , an energy efficient and fully operational protocol stack for IP-enabled wireless sensor networks based on the IEEE 802.15.4 beacon-enabled mode. The stack runs on a hardware platform with photovoltaic cell energy harvesting developed by STMicroelectronics (STM) that can operate autonomously for long periods of time. G reen N et integrates several standard mechanisms and enhances existing protocols, which results in an operational platform with the performance beyond the current state of the art. In particular, it includes the IEEE 802.15.4 beacon-enabled medium access control (MAC) integrated with lightweight IP routing for achieving very low duty cycles. It offers an advanced discovery scheme that accelerates the process of joining the network and proposes an adaptation scheme for adjusting the duty cycle of harvested nodes to the available energy for increased performance. Finally, it supports security at two levels: a basic standard secure operation at the link layer and advanced scalable data payload security. This paper describes all techniques and mechanisms for saving energy and operating at very low duty cycles. It also provides an evaluation of the performance and energy consumption of G reen N et .

52 citations

Journal ArticleDOI
TL;DR: The measurements indicate that the carrier dynamics is controlled by nonradiative recombination associated with surface recombinations in these Si-based nanocavities, and the quality factor of the fundamental mode observed at a normalized frequency u = a/lambda~_ 0.25 is strongly dependent on the incident pump power.
Abstract: We have investigated the quality factors of silicon-based photonic crystal nanocavities using the photoluminescence of a single layer of Ge/Si self-assembled islands as an internal source. We focus on membrane-type L3 elongated cavities with or without their lateral edge air holes shifted in position. The photoluminescence measurements are performed at room temperature. We show that the quality factor of the fundamental mode observed at a normalized frequency u=a/λ≃0.25 is strongly dependent on the incident pump power. This dependence is associated with the free-carrier absorption of the photogenerated carriers. The slope of the quality factor vs. incident pump power gives access to the carrier recombination dynamics in these Si-based nanocavities. The measurements indicate that the carrier dynamics is controlled by non-radiative recombination associated with surface recombinations. A surface recombination velocity of 4.8×104cm/s is deduced from the experiments. The spectral red-shift of the cavity modes as a function of incident pump power is correlated to the temperature rise due to thermo-optic effects. The measured temperature rise, which can reach 190 K, is correlated to the value estimated by a thermal analysis.

52 citations

Journal ArticleDOI
TL;DR: In this paper, the authors describe a scheme based on the existing microelectronic technology for their production without the use of advanced lithography and how it can be arranged to host molecular devices.
Abstract: The definition of features on the nanometre length scale (NLS) is impossible via conventional lithography, but can be done using extreme ultraviolet, synchrotron-radiation, or electron beam lithography. However, since these techniques are very expensive and still in their infancy, their exploitation in integrated circuit (IC) processing is still highly putative. Geometries on the NLS can however be produced with relative ease using the spacer patterning technique, i.e. transforming vertical features (like film thickness) in the vicinity of a step of a sacrificial layer into horizontal features. The ultimate length that can be produced in this way is controlled by the steepness of the step defining the sacrificial layer, the uniformity of the deposited or grown films, and the anisotropy of its etching. While useful for the preparation of a few devices with special needs, the above trick does not allow by itself the development of a nanotechnology where each layer useful for defining the circuit should be on the NLS and aligned on the underlying geometries with tolerances on the NLS. Setting up such a nanotechnology is a major problem which will involve the IC industry in the post-Roadmap era. Irrespective of the detailed structure of the basic constituents (molecules, supramolecular structures, clusters, etc), ICs with nanoscopic active elements can hardly be prepared without the ability to produce arrays of conductive strips with pitch on the NLS. This work is devoted to describing a scheme (essentially based on the existing microelectronic technology) for their production without the use of advanced lithography and how it can be arranged to host molecular devices.

52 citations

Patent
20 Dec 2002
TL;DR: A process for manufacturing an SOI wafer, including the steps of: forming cavities delimiting structures of semiconductor material, thinning out the structures through a thermal process; and completely oxidizing the structures as mentioned in this paper.
Abstract: A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.

52 citations

Patent
29 Aug 1997
TL;DR: In this article, a linear type of voltage regulator, having an input terminal adapted to receive a supply voltage thereon, and an output terminal adapting to deliver a regulated output voltage, includes a power transistor and a driving circuit therefor.
Abstract: A linear type of voltage regulator, having an input terminal adapted to receive a supply voltage thereon, and an output terminal adapted to deliver a regulated output voltage, includes a power transistor and a driving circuit therefor. The driving circuit includes an operational amplifier having a differential input stage biased by a bias current which varies proportionally with the output current of the regulator.

52 citations


Authors

Showing all 17185 results

NameH-indexPapersCitations
Bharat Bhushan116127662506
Albert Polman9744542985
G. Pessina8482830807
Andrea Santangelo8388629019
Paolo Mattavelli7448219926
Daniele Ielmini6836716443
Jean-François Carpentier6245914271
Robert Henderson5844013189
Bruce B. Doris5660412366
Renato Longhi551778644
Aldo Romani5442511513
Paul Muralt5434412694
Enrico Zanoni5370513926
Gaudenzio Meneghesso5170312567
Franco Zappa502749211
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
202225
2021560
2020798
2019952
2018948
2017781